Chip Testing Timing Adjustment for Data Reception Accuracy
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Solution Overview
Problem
When multiple chips to be tested use the same timing information to receive data, performance differences between the chips can result in some chips not accurately receiving the data, leading to data writing errors and incorrect test results.
Innovation Solution
A chip testing method and apparatus that determine a data receiving window for each chip, calculate a time adjustment parameter based on this window and a preset data input window for the test machine, and adjust the actual input time point for each chip to ensure data receipt within its designated window.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the same timing information is shared by all chips to be tested, then the test process is simplified and data input is simultaneous for all chips, but performance differences between chips cause some chips to fail to accurately receive data
Solution Approach 1:
The patent segments the unified timing information into chip-specific timing parameters. Each chip is assigned its own data receiving window and time adjustment parameter based on its performance characteristics, transforming the unified timing approach into a segmented, customized timing approach that accounts for individual chip variations
Solution Approach 2:
The patent applies local quality by customizing timing parameters for each chip based on its specific performance characteristics. Each chip receives a tailored data receiving window and time adjustment parameter rather than a universal timing setting, ensuring optimal data reception for each chip's specific performance level
2Reliability
If individual timing parameters are determined for each chip based on performance differences, then data reception accuracy is improved, but the test process complexity increases
Solution Approach 1:
The patent performs preliminary characterization of each chip's performance before the actual test process. By pre-determining the data receiving window and time adjustment parameter for each chip based on its performance characteristics, the system prepares customized timing parameters in advance, avoiding the need for complex real-time adjustments during testing
Solution Approach 2:
The patent changes the timing parameters (data receiving window and time adjustment parameter) based on each chip's performance characteristics. By adjusting these parameters to match individual chip performance, the system achieves accurate data reception while managing complexity through parameter optimization rather than structural complexity
Data Source
AI summary
A chip testing method includes: a data receiving window corresponding to each chip to be tested is determined; a time adjustment parameter corresponding to each chip to be tested is determined according to the data receiving window corresponding to each chip to be tested and a data input window preset for a test machine is determined; an actual input time point corresponding to each chip to be tested is determined according to the time adjustment parameter corresponding to each chip to be tested; and data is inputted to each chip to be tested at the actual input time point corresponding to the each chip to be tested, to enable each chip to be tested to receive the data inputted by the test machine in the data receiving window corresponding to the each chip to be tested.