Panel with Chip Through-Contacts for High Packing Density
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Solution Overview
Problem
Existing methods for producing electronic components are limited in their ability to create low-defect, large-scale integrated circuits that can be used in confined spaces and do not allow for flexible connection configurations or high packing density.
Innovation Solution
A panel design with a planar semiconductor chip and through-contacts coated with conductive material, a rewiring region subdivided into insulating and conductive layers with external contacts, and a plastic filling layer that encapsulates the chip, enabling flexible connections and high packing density, along with a method involving thin-film technology for building up rewiring regions and using a thermally active adhesive for easy substrate removal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional production methods are used, then manufacturing simplicity is maintained, but manufacturing precision and reliability are insufficient for low-defect large-scale integrated circuits
Solution Approach 1:
The production process is segmented into distinct stages: providing a panel with chip regions, applying filling material to encapsulate chips, forming rewiring regions with conductive layers, and separating individual components. This segmentation allows each stage to be optimized independently, improving manufacturing precision without overwhelming complexity
Solution Approach 2:
The panel is prepared in advance with chip regions and through-contacts before the actual component assembly. The filling material is applied preliminarily to encapsulate chips, creating a stable base structure. This preliminary preparation enables subsequent rewiring and connection steps to be performed with higher precision
2Adaptability or versatility
If components are designed for flexible connection configurations, then adaptability is improved, but device complexity increases
Solution Approach 1:
The invention introduces a vertical dimension by stacking multiple conductive layers (first conductive layer, second conductive layer) above the chip surface. This multi-layer vertical architecture enables flexible connection configurations without increasing lateral complexity, allowing wires to connect to different contact points through different elevation levels
Solution Approach 2:
The filling material serves as an intermediary substance that encapsulates the chip and provides a matrix for embedding through-contacts and forming conductive layers. This intermediary material facilitates flexible wiring configurations by providing a stable medium through which conductors can be routed without directly complicating the chip structure
3Productivity
If through-contacts are provided on chip surfaces, then connection density is improved, but yield loss increases due to contact damage during testing
Solution Approach 1:
The filling material is applied beforehand to encapsulate the chip and provide mechanical protection to the through-contacts. This cushioning effect protects the delicate contact structures during subsequent handling, testing, and assembly operations, reducing yield loss from contact damage while maintaining high connection density
4Productivity
If high packing density is achieved, then productivity is improved, but manufacturing precision requirements increase
Solution Approach 1:
Multiple operations are merged into a unified panel-based process: chips are arranged in a panel format, filling material is applied simultaneously to multiple chips, and rewiring regions are formed in batches. This merging of operations enables high packing density while maintaining manufacturing precision through standardized panel processes rather than individual component handling
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the production of electronic components with flexible connection configurations, high packing density, and reduced yield loss due to direct functionality testing without damaging electrical contacts, while allowing for efficient production and use in confined spaces.
Implementation Method 1
chip through-contacts which extend between a chip rear side and a chip front side and which are provided with electrically conductive material
Implementation Method 2
using a thermally active adhesive for easy substrate removal
Data Source
AI summary
A panel for the production of electronic components is disclosed. The components have a substantially planar semiconductor chip with chip through-contacts which are provided with electrically conductive material. A rewiring region is subdivided into an insulating layer and also a first rewiring arranged therein, the rewiring projecting laterally beyond the side edge of the planar semiconductor chip. The rewiring has external contacts for electrical connections toward the outside. The panel provides a filling layer made of plastic, which encapsulates the semiconductor chip in a side region between the chip front side and the chip rear side and which is connected to the rewiring region.


