Chip-to-Chip Bonding Voltage Compensation for Misalignment
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Solution Overview
Problem
The reliability of semiconductor devices is compromised due to varying pad misalignment, leading to inconsistent voltage delivery across different regions, resulting in potential failures and degraded cell distribution characteristics.
Innovation Solution
A semiconductor device design that includes a voltage generation circuit linked to pads on a second chip, which provides compensated voltages to corresponding pads on a first chip based on measured voltage drops across contact resistances, stabilizing the voltage delivery regardless of pad misalignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If chip-to-chip bonding is used to reduce occupation area, then device size is reduced, but voltage delivery consistency deteriorates due to pad misalignment
Solution Approach 1:
The patent applies local quality by providing different compensation voltages to different regions (first region and second region) based on their specific contact resistance characteristics. The voltage generation circuit detects region-specific voltage drops and applies tailored compensation, making each region's voltage delivery optimized for its local bonding conditions rather than using a uniform approach.
Solution Approach 2:
The patent changes the voltage parameter dynamically by adjusting the compensation voltage amount based on detected contact resistance values. The voltage generation circuit modifies the voltage supplied to different regions according to the measured voltage drops, transforming a static voltage supply system into a dynamic one that adapts to varying contact conditions.
2Ease of manufacture
If pad bonding is performed without compensation, then manufacturing process is simple, but contact resistance variation causes voltage drop inconsistency
Solution Approach 1:
The patent implements feedback by having the voltage generation circuit detect the actual voltage drop across the bonded pads and use this information to adjust the compensation voltage. The system continuously monitors the contact resistance effects and modifies its output accordingly, creating a closed-loop control system that maintains voltage delivery accuracy despite manufacturing variations.
Solution Approach 2:
The patent applies preliminary action by pre-compensating for expected voltage drops through the voltage generation circuit. Before actual voltage delivery to the memory chip, the system detects potential contact resistance issues and adjusts the voltage in advance, ensuring that the final delivered voltage remains consistent even though manufacturing alignment may vary.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively compensates for voltage drops caused by pad misalignment, ensuring consistent voltage delivery and improving the reliability of semiconductor devices by stabilizing operation voltages across different regions.
Implementation Method 1
voltage drop value for each region due to a contact resistance between the plurality of first test pads and the plurality of second test pads
Implementation Method 2
provides a compensated voltage to the plurality of second pads for each of the plurality of regions, based on a voltage drop value for each region
Data Source
AI summary
A semiconductor device includes a first chip, divided into a plurality of regions, including a plurality of first pads and a plurality of first test pads in each of the plurality of regions; and a second chip including a plurality of second pads corresponding to the plurality of first pads and a plurality of second test pads corresponding to the plurality of first test pads, and bonded onto the first chip such that the plurality of second pads are coupled to the plurality of first pads. The second chip includes a voltage generation circuit linked to the plurality of second pads, that provides a compensated voltage to the plurality of second pads for each of the plurality of regions, based on a voltage drop value for each region due to a contact resistance between the plurality of first test pads and the plurality of second test pads.


