Chip-to-chip interconnect using layered Ethernet architecture

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Solution Overview

Problem

Current chip-to-chip communication protocols in data centers are not scalable and flexible, hindering the growth of artificial intelligence clusters due to the use of chip-specific protocols that do not adapt well with network speed advancements.

Innovation Solution

Implementing a layered communication architecture that leverages existing Ethernet protocols for chip-to-chip communication, supporting credit-based flow control and packet retransmission techniques, allowing for scalable and flexible communication by standardizing the physical protocol and incorporating additional reliability layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If chip-specific communication protocols are used for chip-to-chip communication, then communication can be established between processing units, but the system does not scale well with network speed growth and involves cumbersome communication protocols

Engineering Contradiction:
Improvescalability with network speed growthVSAvoidcommunication protocol complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies universality by using standard Ethernet protocols for chip-to-chip communication instead of chip-specific protocols. The Ethernet interface and protocol stack enable the same communication infrastructure to serve multiple purposes and scale with network speed advancements, eliminating the need for separate proprietary protocols for each chip design.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent segments the communication system into distinct layers including physical layer, data link layer, and application layer. This segmentation allows each layer to be independently optimized and updated, enabling the system to scale with network speed growth while maintaining manageable protocol complexity through modular design.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If standard Ethernet protocols are used for chip-to-chip communication, then scalability and flexibility are improved, but additional reliability layers and flow control mechanisms increase system complexity

Engineering Contradiction:
Improveflexibility of communication architectureVSAvoidlayered protocol implementation complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic flow control mechanisms that adapt to network conditions. The credit-based flow control system dynamically adjusts data transmission based on buffer availability and network congestion, allowing the system to maintain flexibility while managing complexity through adaptive rather than static protocols.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent incorporates feedback mechanisms through acknowledgment packets and credit-based flow control. The receiving端 sends feedback about buffer status and data receipt, allowing the transmitting端 to adjust its transmission rate and retransmit lost packets, thereby managing complexity through controlled feedback loops rather than overly simplistic protocols.

Inventive Principle:
Principle #23Feedback

3Reliability

If credit-based flow control and packet retransmission are implemented, then data reliability is improved, but communication overhead increases

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoidcommunication overhead
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent applies partial action by implementing selective retransmission rather than redundant transmission of all data. The system retransmits only lost or corrupted packets based on acknowledgment feedback, and uses credit-based flow control to transmit data only when receiving端 has buffer capacity, thereby improving reliability while minimizing unnecessary communication overhead.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20240378097A1Chip-to-chip interconnect with a layered communication architecture
Publication Date: 2024.11.14 META PLATFORMS INC
  • US20240378097A1 patent drawing
  • US20240378097A1 patent drawing
  • US20240378097A1 patent drawing

AI summary

A system includes a first integrated circuit package including a first group of one or more artificial intelligence processing units and a first chip-to-chip interconnect communication unit and a second integrated circuit package including a second group of one or more artificial intelligence processing units and a second chip-to-chip interconnect communication unit. The system also includes an interconnect between the first integrated circuit package and the second integrated circuit package, wherein the first chip-to-chip interconnect communication unit and the second chip-to-chip interconnect communication unit manage Ethernet-based communication via the interconnect using a layered communication architecture supporting a credit-based data flow control and a retransmission data flow control.