Chip Tray Vacuum Fixing for Uniform Probe Alignment

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Solution Overview

Problem

The challenge lies in efficiently testing multiple integrated circuit chips simultaneously, as they are separated by the dicing process and do not have uniform distances between adjacent chips, making simultaneous testing difficult.

Innovation Solution

A chip fixing apparatus and method that involves cutting a wafer into chip packages, re-arranging them on a chip tray with vacuum lines to maintain a uniform distance, and testing the re-arranged packages using a chip testing apparatus, allowing for stable and efficient testing of multiple chips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If chips are separated through dicing process, then individual chips can be obtained, but the distance between adjacent chips becomes non-uniform making simultaneous testing difficult

Engineering Contradiction:
Improvetesting efficiencyVSAvoiddistance uniformity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The wafer is divided into multiple chip packages through dicing, and each chip package is further segmented into individual chips that can be independently arranged. This segmentation allows chips to be repositioned on the tray to achieve uniform spacing for simultaneous testing, resolving the contradiction between obtaining individual chips and maintaining uniform distance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from the original two-dimensional wafer layout with fixed chip positions to a new two-dimensional tray layout where chips can be repositioned. By changing the arrangement dimension and allowing flexible positioning on the tray, uniform spacing is achieved despite the non-uniform original positions after dicing.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If multiple chips are tested simultaneously, then testing efficiency improves, but alignment difficulty increases due to non-uniform chip distances

Engineering Contradiction:
Improvetesting efficiencyVSAvoidalignment difficulty
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

Chips are pre-arranged on the tray to achieve uniform spacing before the testing process begins. This preliminary arrangement action eliminates the alignment difficulty during testing, allowing multiple chips to be tested simultaneously without operational complexity. The uniform spacing is established in advance to facilitate easy probe alignment.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The tray serves as an intermediary device between the dicing process and the testing process. It provides a standardized platform with uniform grid positions where chips can be placed, mediating the transition from non-uniform chip positions after dicing to uniform positions required for simultaneous testing with probe alignment.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If chip packages are re-arranged on tray, then uniform distance is achieved for testing, but process complexity increases

Engineering Contradiction:
Improvedistance uniformityVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The system uses self-aligning features where chip packages are designed with positioning structures that automatically guide them to correct uniform positions on the tray. This self-service mechanism reduces the need for complex external positioning equipment or manual adjustment, achieving distance uniformity while minimizing process complexity.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables stable and efficient testing of multiple chip packages by maintaining a uniform distance between them, facilitating the alignment of probes and improving the yield of good products by sorting functional chips.

Implementation Method 1

fixing the chip packages onto the chip tray by forming a vacuum between the chip packages and the chip tray through the first vacuum line

Methodology Applied
Scientific EffectVacuum: Vacuum

Data Source

PatentUS8652858B2Chip testing method
Publication Date: 2014.02.18 SAMSUNG ELECTRONICS CO LTD
  • US8652858B2 patent drawing
  • US8652858B2 patent drawing
  • US8652858B2 patent drawing

AI summary

A chip testing method includes cutting a wafer into chip packages, re-arranging the chip packages on a chip tray, and testing the re-arranged chip packages. The wafer includes a plurality of substrates vertically stacked thereon, and each of the plurality of substrates has a plurality of chips mounted thereon.