Chip-Underside PCB Routing for Shorter High-Speed Signal Traces
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Solution Overview
Problem
The increasing capacity and speed of switch chips, particularly in serializer/deserializer (SERDES) systems, lead to significant signal loss due to longer trace lengths on printed circuit boards (PCBs), which exceed the standard length limit of approximately 9 inches, necessitating higher-grade PCB materials and designs.
Innovation Solution
A circuit board design that includes a chip installation region and a signal connector region, with signal traces routed through the bottom side of the chip installation region, utilizing multiple board layers and via holes to minimize trace length and prevent interference, allowing for a more efficient layout that reduces signal loss and board thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If signal traces are routed through conventional paths on the PCB surface, then the routing is simple, but the trace length increases leading to signal loss
Solution Approach 1:
The patent routes signal traces through the thickness dimension of the PCB by using via holes to connect different layers. The first signal trace passes through the board body at the bottom side of the chip installation region, utilizing the Z-dimension (thickness direction) to create a more direct path between the chip installation region and signal connector installation region, thereby reducing trace length and signal loss.
2Reliability
If the trace length is reduced to meet signal loss standards, then signal integrity is maintained, but the PCB requires higher grade materials and more complex design
Solution Approach 1:
The patent divides the signal trace into multiple segments across different PCB layers. The first signal trace is segmented into portions on different layers connected by via holes, allowing the trace to navigate through the board body in a controlled manner. This segmentation enables precise control of trace length and routing path without requiring excessive complexity in the overall PCB design.
Solution Approach 2:
The patent embeds the first signal trace within the board body structure, nesting the trace path inside the PCB thickness rather than routing it on the surface. The trace is nested through the board layers, utilizing the internal space of the PCB to achieve a more efficient routing path that reduces length while maintaining design manageability.
3Length of moving object
If signal traces are routed around the periphery of the chip installation region, then the routing path is clear, but the trace length increases significantly
Solution Approach 1:
Instead of routing the first signal trace around the periphery of the chip installation region on the PCB surface, the patent utilizes the thickness dimension by passing the trace through the board body at the bottom side of the chip installation region. This dimensional change creates a direct path through the interior of the PCB, significantly reducing trace length while maintaining routing clarity through proper layer design and via placement.
Data Source
AI summary
A circuit board and an electronic device. The circuit board includes a board body, where a surface of the board body has a chip installation region and a signal connector installation region arranged along a first direction; an end of the chip installation region away from the signal connector installation region has a first signal pin region, and in the chip installation region, the first signal pin region is the farthest from the signal connector installation region; and pins of the first signal pin region are in signal connection with corresponding pins of the signal connector installation region through a first signal trace, and the first signal trace passes through a portion of the board body that is located at a bottom side of the chip installation region.