Chip-to-Chip Vector Signaling for High-Bandwidth Low-Power Links

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Solution Overview

Problem

Current chip-to-chip communication systems face challenges in achieving high bandwidth, low latency, and low power consumption while dealing with common-mode noise and pin efficiency, especially in multi-chip systems.

Innovation Solution

The implementation of a vector signaling method using a balanced H4 code, where four wires transmit three bits per symbol period with signal levels representing +1, +1/3, -1/3, and -1, and a receiver system utilizing multi-input comparators to detect and decode the signals without explicit decoding functions, ensuring high bandwidth and low power utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If differential signaling is used to cancel common-mode noise, then noise resilience is improved, but pin efficiency deteriorates due to requiring paired wires for each signal

Engineering Contradiction:
Improvenoise resilienceVSAvoidpin efficiency
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple signal functions into a single wire by using vector signaling where four wires carry multiple signals simultaneously through time-division multiplexing. The H4 code transmits three bits per symbol period over four wires, with each wire carrying a composite signal that represents multiple data streams. This combining approach achieves differential signaling's noise cancellation benefits while reducing the total number of pins required.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Each wire in the vector signaling system serves multiple functions by carrying different signals at different time periods. The four wires collectively handle multiple data channels, control signals, and acknowledgment signals simultaneously. This multi-functionality allows the system to achieve high pin efficiency while maintaining noise resilience through the vector-coded differential signaling approach.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If more wires are used to increase bandwidth, then data throughput is improved, but pin efficiency and power consumption worsen

Engineering Contradiction:
ImprovebandwidthVSAvoidpin efficiency
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system uses periodic time-division multiplexing where four wires transmit different signals in different time periods within each symbol period. During each time period, specific wires carry data signals while others carry control or acknowledgment signals. This periodic action allows the system to achieve high bandwidth (24 gigabytes per second aggregate throughput) while maintaining pin efficiency by reusing the same four wires for multiple functions across different time periods.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The vector signaling system dynamically assigns signal roles to different wires based on the current time period and data requirements. The H4 code dynamically modulates the four wires to carry different combinations of data bits, control signals, and acknowledgments. This dynamic signal allocation allows the system to optimize bandwidth utilization and pin efficiency simultaneously by adapting the signal distribution across wires in real-time based on communication needs.

Inventive Principle:
Principle #15Dynamics

3Speed

If high-speed signaling is used to reduce latency, then communication speed is improved, but power consumption and noise susceptibility worsen

Engineering Contradiction:
Improvecommunication speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The system changes the signaling parameters by using reduced-swing voltage levels and vector-coded signals instead of traditional high-voltage single-ended signaling. The H4 code uses four discrete signal levels per wire, allowing high-data-rate transmission with lower voltage swings. This parameter change reduces power consumption while maintaining high communication speed (8 gigabits per second per wire) and improves noise immunity through the differential vector signaling approach.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9071476B2Methods and systems for high bandwidth chip-to-chip communications interface
Publication Date: 2015.06.30 KANDOU LABS SA
  • US9071476B2 patent drawing
  • US9071476B2 patent drawing
  • US9071476B2 patent drawing

AI summary

Systems and methods are described for transmitting data over physical channels to provide a high bandwidth, low latency interface between integrated circuit chips with low power utilization. Communication is performed using group signaling over multiple wires using a vector signaling code, where each wire carries a low-swing signal that may take on more than two signal values.