On-Chip Voltage Measurement Using Encoder Calibration Timing
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Solution Overview
Problem
Current methods for measuring DC voltages on integrated circuits are costly and inefficient, particularly for analog and mixed-signal circuits, as they often require external equipment and sequential measurement of critical nodes, which prolongs test times and increases silicon area when using multiple ADCs.
Innovation Solution
The method involves calibrating an encoder on the integrated circuit using a reference signal and a calibration signal to determine the time associated with state changes, allowing for accurate and precise measurement of multiple critical nodes using relatively inexpensive circuitry, enabling simultaneous measurement of multiple nodes and reducing test time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external equipment and scanning scheme based on IEEE 1149.4 standard are used to measure DC voltages, then measurement capability is provided, but test time becomes excessively long due to sequential access of nodes
Solution Approach 1:
The patent combines multiple voltage measurement functions into a single on-chip ADC resource. By time-multiplexing the ADC across multiple critical nodes, the system achieves the capability to measure multiple nodes without requiring multiple ADCs or external equipment, thus reducing both area and test time while maintaining measurement precision.
Solution Approach 2:
The patent transitions from external equipment-based measurement to on-chip measurement, adding the dimension of integration. By moving the ADC inside the chip and using time-multiplexing, the system simultaneously achieves compact integration and efficient multi-node measurement capability.
2Productivity
If multiple ADCs are used in parallel to measure multiple critical nodes simultaneously, then measurement time is reduced, but silicon area significantly increases
Solution Approach 1:
The patent merges multiple voltage measurement functions into a single ADC resource by implementing time-multiplexed switching. The single ADC sequentially measures multiple critical nodes during normal operation, achieving the functional equivalent of multiple ADCs while using only one physical device, thus minimizing silicon area occupation.
Solution Approach 2:
The patent employs periodic time-multiplexed switching to allocate the single ADC to different critical nodes at different time intervals. This periodic allocation allows the ADC to service multiple nodes systematically, achieving comprehensive coverage without requiring simultaneous ADC instances, thereby reducing area while maintaining measurement capability.
3Area of stationary object
If a single ADC is used to measure one critical node at a time sequentially, then silicon area is minimized, but test time becomes excessive
Solution Approach 1:
The patent implements periodic time-multiplexed switching that systematically allocates the single ADC to different critical nodes at defined time intervals. This periodic measurement approach allows the ADC to efficiently service multiple nodes during normal operation, reducing total test time while maintaining minimal silicon area usage.
Solution Approach 2:
The patent ensures continuous useful action by integrating the ADC measurements into the normal operational flow of the system. Rather than dedicating separate test phases, the ADC performs measurements during regular operation, eliminating idle time and ensuring that the measurement function is continuously utilized without disrupting system functionality.
4Reliability
If production electrical testing is performed on complex integrated circuits with millions of component devices, then functionality validation is achieved, but testing cost escalates significantly
Solution Approach 1:
The patent implements self-service by providing built-in voltage measurement capability directly on the chip through the integrated ADC. The system monitors its own critical nodes internally without requiring external measurement equipment, thereby eliminating costly external testing infrastructure and reducing production testing costs while maintaining reliability validation.
Solution Approach 2:
The patent creates a universal on-chip measurement resource that can monitor multiple different critical nodes for various circuit functionalities. This single ADC resource serves multiple measurement purposes across different parts of the circuit, providing comprehensive functionality validation without requiring separate dedicated measurement systems for each function, thus reducing overall testing cost.
Data Source
AI summary
Methods and apparatus to measure a voltage on an integrated circuit are disclosed. An example method to measure a voltage on an integrated circuit provides a reference signal to a first input of an encoder, provides a signal having a first voltage to a second input of the encoder, varies the reference signal from a second voltage to a third voltage, determines a first time value associated with a change in a state of an output of the encoder during the varying of the reference signal, and measures the first voltage based on the first time value.