Chip Internal Voltage Prediction Model for Early Load Spike Detection

Solution Overview

Problem

Existing systems fail to timely detect abnormal chip internal voltage changes caused by sudden increases in load, leading to functional failures due to voltage drops, as interventions are often made too late.

Innovation Solution

A method for generating a chip internal voltage prediction model using load and characterization data sets, calibrated and trained to predict voltage changes, allowing for early detection and timely intervention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If voltage monitoring is performed at multiple internal nodes of the chip, then voltage prediction accuracy is improved, but power consumption increases

Engineering Contradiction:

Improvevoltage prediction accuracyVSAvoidpower consumption

Core Design Contradiction:

Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing voltage characteristics for multiple internal nodes during chip design. The voltage prediction model is built in advance using simulated data from these nodes, allowing the system to predict voltages without performing real-time measurements or calculations during chip operation, thus avoiding the power consumption associated with active monitoring.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent uses copying by creating a virtual voltage prediction model that replicates the behavior of multiple internal nodes without physically monitoring them. The model copies the voltage characteristics through simulation and storage, enabling prediction of node voltages without the need for actual voltage sensing hardware or continuous measurement operations that would consume power.

Inventive Principle:

Principle #26Copying

2Measurement precision

If voltage monitoring is performed at multiple internal nodes, then voltage prediction accuracy is improved, but device complexity increases

Engineering Contradiction:

Improvevoltage prediction accuracyVSAvoidsystem complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing voltage characteristics for multiple internal nodes during chip design. The voltage prediction model is built in advance using simulated data from these nodes, allowing the system to predict voltages without performing real-time measurements or calculations during chip operation, thus avoiding the power consumption associated with active monitoring.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent uses copying by creating a virtual voltage prediction model that replicates the behavior of multiple internal nodes without physically monitoring them. The model copies the voltage characteristics through simulation and storage, enabling prediction of node voltages without the need for actual voltage sensing hardware or continuous measurement operations that would consume power.

Inventive Principle:

Principle #26Copying

3Measurement precision

If voltage monitoring is performed at multiple internal nodes, then voltage prediction accuracy is improved, but design time increases

Engineering Contradiction:

Improvevoltage prediction accuracyVSAvoiddesign time

Core Design Contradiction:

Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing voltage characteristics for multiple internal nodes during chip design. The voltage prediction model is built in advance using simulated data from these nodes, allowing the system to predict voltages without performing real-time measurements or calculations during chip operation, thus avoiding the power consumption associated with active monitoring.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent uses copying by creating a virtual voltage prediction model that replicates the behavior of multiple internal nodes without physically monitoring them. The model copies the voltage characteristics through simulation and storage, enabling prediction of node voltages without the need for actual voltage sensing hardware or continuous measurement operations that would consume power.

Inventive Principle:

Principle #26Copying

Data Source

PatentEP4425368B1Chip internal voltage prediction model generation method, chip internal voltage prediction method, and related apparatuses

Publication Date: 2026.05.06 HYGON INFORMATION TECH CO LTD

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AI summary

Embodiments of the present disclosure provide a generation method for a chip internal voltage prediction model, a prediction method, and related apparatuses. The generation method for the chip internal voltage prediction model includes: obtaining a load data set and a relevant index data set of a chip respectively; calibrating the relevant index data set according to a calibration cycle number and obtaining a calibrated relevant index data set; and training the chip internal voltage prediction model based on the load data set and the calibrated relevant index data set, and obtaining the chip internal voltage prediction model with completed training. The method provided by the embodiments of the present disclosure can predict the situation of the chip internal voltage in advance, so that timely intervention can be made in the operating status of the chip.