Chip-to-Wafer Structure With Semiconductor Heat-Spreading Layer

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Solution Overview

Problem

Existing chip-to-wafer (C2W) structures suffer from poor heat dissipation, which limits their performance in 3D-IC technology.

Innovation Solution

A C2W structure is designed with a second semiconductor substrate covering the chips and dielectric layer, featuring trenches in both the substrate and dielectric layer to enhance heat dissipation. The second semiconductor substrate provides several times better heat dissipation properties than the dielectric layer alone.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a dielectric layer is used to cover the first semiconductor substrate in C2W structure, then the structure is simplified and manufacturing is easier, but heat dissipation performance deteriorates

Engineering Contradiction:
Improvestructural simplicityVSAvoidheat dissipation performance
Core Design Contradiction:
Ease of manufactureVSTemperature

Solution Approach 1:

The patent combines dielectric layer with semiconductor substrate to create a composite structure. The second semiconductor substrate is bonded to the first semiconductor substrate through the dielectric layer, forming a hybrid structure that leverages the electrical insulation properties of the dielectric while utilizing the superior thermal conductivity of semiconductor materials for heat dissipation.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The dielectric layer serves as an intermediary between the two semiconductor substrates. It provides electrical isolation while allowing thermal management through the bonded semiconductor structures. The intermediary layer enables both electrical functionality and thermal management in the heterogeneous integration.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If existing C2W structure is used, then manufacturing process is simpler, but heat dissipation capability is insufficient

Engineering Contradiction:
Improvemanufacturing process complexityVSAvoidheat dissipation capability
Core Design Contradiction:
Device complexityVSTemperature

Solution Approach 1:

The patent divides the heat dissipation function into separate components: the dielectric layer provides structural support and electrical isolation, while the second semiconductor substrate specifically handles thermal management. This segmentation allows each component to be optimized for its specific function while maintaining manufacturing feasibility.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second semiconductor substrate serves multiple functions: it provides mechanical support, enables electrical connections through bonding, and critically, provides enhanced heat dissipation capability. This multi-functionality reduces the need for additional dedicated heat dissipation components, keeping the manufacturing process relatively simple.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The C2W structure achieves greatly improved heat dissipation performance, allowing for more efficient thermal management in 3D-IC applications.

Implementation Method 1

the second semiconductor substrate covering the plurality of chips and the dielectric layer provides heat dissipation properties several times better than the dielectric layer

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20250069966A1C2w structure and method for making same
Publication Date: 2025.02.27 WUHAN XINXIN SEMICON MFG CO LTD
  • US20250069966A1 patent drawing
  • US20250069966A1 patent drawing
  • US20250069966A1 patent drawing

AI summary

A chip-to-wafer (C2W) structure and a method for making the C2W structure are disclosed. The C2W structure includes a first semiconductor substrate, a plurality of chips located above the first semiconductor substrate, a dielectric layer covering the first semiconductor substrate and a second semiconductor substrate covering the plurality of chips and the dielectric layer. The C2W structure has greatly improved heat dissipation performance.