Chipkill ECC Memory Compression Using Embedded Error Patterns
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In processor-based systems employing chipkill-correct ECC mechanisms, the strong ECC protection schemes consume storage area needed for compression indicators, making it difficult to effectively indicate compression status of memory blocks, which hampers memory bandwidth compression.
Innovation Solution
A compressed memory controller (CMC) implicitly stores a compression indicator by introducing a specified error pattern into ECC bits, allowing it to differentiate between compressed and uncompressed data by inverting specific bytes in the outer ECC segment, thereby indicating the presence of compressed data without using additional storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If chipkill-correct ECC mechanism is employed to provide strong error correction, then reliability is improved, but the storage area for compression indicators is reduced
Solution Approach 1:
The patent merges the compression indicator storage function with the ECC storage area. By embedding compression indicators within the ECC bits that are already allocated for error correction, the system eliminates the need for separate compression indicator storage space. This merging allows both compression indication and error correction to coexist within the same storage resources.
Solution Approach 2:
The ECC storage area is given dual functionality: it serves both as error correction storage and as compression indicator storage. The same ECC bits are used to provide both error protection and compression status indication, making the storage resource universal and eliminating the trade-off between reliability and storage area availability.
2Loss of information
If compression indicators are explicitly stored in ECC storage area, then compression status can be indicated, but the bandwidth savings are reduced due to consumption of ECC storage area
Solution Approach 1:
The patent combines compression indicators with ECC data words, so that compression status information is embedded within the existing ECC structure. This merging eliminates the need for additional separate storage for compression indicators, thereby preserving memory bandwidth while still providing explicit compression status indication.
3Productivity
If compression is applied to reduce memory bandwidth consumption, then productivity is improved, but the complexity of managing compression status increases
Solution Approach 1:
The patent merges compression status tracking with the existing ECC management infrastructure. By using the same ECC bits to indicate both error correction status and compression status, the system avoids adding separate management mechanisms, thereby improving productivity without significantly increasing complexity.
Solution Approach 2:
The patent implements feedback through the ECC mechanism itself, where the ECC bits provide information about compression status that can be used by the memory controller to manage compressed data. This feedback mechanism is integrated into the existing ECC workflow, avoiding the need for separate complex management systems.
Data Source
AI summary
Providing memory bandwidth compression in chipkill-correct memory architectures is disclosed. In this regard, a compressed memory controller (CMC) introduces a specified error pattern into chipkill-correct error correcting code (ECC) bits to indicate compressed data. To encode data, the CMC applies a compression algorithm to an uncompressed data block to generate a compressed data block. The CMC then generates ECC data for the compressed data block (i.e., an “inner” ECC segment), appends the inner ECC segment to the compressed data block, and generates ECC data for the compressed data block and the inner ECC segment (i.e., an “outer” ECC segment). The CMC then intentionally inverts a specified plurality of bytes of the outer ECC segment (e.g., in portions of the outer ECC segment stored in different physical memory chips by a chipkill-correct ECC mechanism). The outer ECC segment is then appended to the compressed data block and the inner ECC segment.