Chiplet Architecture for AI Model Training and Inference
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Solution Overview
Problem
The existing systems for training and deploying artificial intelligence models face inefficiencies due to differing computing power and memory requirements between training and inference phases, leading to cumbersome and time-consuming processes for fine-tuning models, especially when transitioning between high-performance training systems and lower-performance deployment systems.
Innovation Solution
A method that distributes the functionality of a deep neural network across multiple chiplets, where frozen layers are implemented in one set of chiplets and trainable layers in another, with the trainable chiplets having additional memory and processing capacity to efficiently perform fine-tuning and training, allowing for efficient fine-tuning and training on the same hardware used for inference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If training is performed on high-performance systems with significant computing and memory resources, then model training efficiency and performance are improved, but system complexity and cost increase
Solution Approach 1:
The patent divides the neural network into multiple chiplets, where each chiplet contains a portion of the network layers. This segmentation allows the system to distribute computational tasks across multiple smaller units, achieving training efficiency without requiring a single complex high-performance system. The frozen layers are implemented in one set of chiplets while trainable layers are in another set, enabling efficient fine-tuning.
Solution Approach 2:
The chiplet architecture is designed to serve multiple functions: it can perform both training and inference operations, as well as fine-tuning. The same hardware infrastructure (chiplets with additional memory and processing capacity) is used for all these operations, eliminating the need for separate high-performance training systems and reducing overall system complexity.
2Productivity
If separate high-performance training systems and deployment systems are used, then training performance and inference efficiency are optimized, but transition time and operational complexity increase
Solution Approach 1:
The patent merges the training and deployment capabilities into a single integrated chiplet architecture. The same hardware that performs inference also performs training and fine-tuning operations. This eliminates the need to transition between separate training systems and deployment systems, saving time and reducing operational complexity.
Solution Approach 2:
The system dynamically switches between different operational modes (training, fine-tuning, inference) using the same hardware infrastructure. The trainable chiplets can be activated or deactivated based on the current operation being performed, allowing flexible adaptation without physical reconfiguration or system migration.
3Adaptability or versatility
If all chiplets have additional memory and processing capacity for training operations, then fine-tuning capability is improved, but hardware resource consumption and cost increase
Solution Approach 1:
The patent applies local quality by providing additional memory and processing capacity only to the chiplets that contain trainable layers, rather than uniformly across all chiplets. The first set of chiplets (with frozen layers) has standard resources, while the second set of chiplets (with trainable layers) has enhanced resources for fine-tuning operations. This selective resource allocation improves fine-tuning capability while minimizing overall hardware consumption.
Data Source
AI summary
A method for training and fine-tuning an artificial intelligence model is disclosed. In one embodiment, such a method distributes, across multiple chiplets of a package, functionality associated with a deep neural network. The method implements, within a first set of chiplets, frozen layers of the deep neural network. By contrast, the method implements, within a second set of chiplets, trainable layers of the deep neural network. The number of chiplets in the second set may be smaller than the number of chiplets in the first set and may consist of a single chiplet in some embodiments. In certain embodiments, the second set of chiplets has one or more of additional memory capacity and additional processing capacity compared to the first set of chiplets in order to train and fine tune the trainable layers. A corresponding apparatus is also disclosed.