Double-Sided Chiplet Bridge Die Transfer for Tighter Pitch Interconnects
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor devices face limitations in achieving tighter pitches and higher bandwidths due to constraints in bridge die manufacturing, necessitating the development of advanced chiplet bridge dies with a carrier to enhance interconnectivity and functionality.
Innovation Solution
The method involves forming double-sided bridge dies on a temporary carrier, which are then integrated into a chiplet design using conductive layers, insulating layers, and adhesive layers to create a semiconductor package with reduced pitch and increased bandwidth through dual-sided conductive traces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If bridge die are used to provide tighter pitch and higher bandwidth, then interconnect performance is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The bridge die structure is segmented into multiple independent conductive signal paths that can be manufactured and tested separately before final integration. This segmentation allows for tighter pitch without proportionally increasing overall complexity, as each segment can be processed through standardized manufacturing flows.
Solution Approach 2:
A carrier substrate is introduced as an intermediary element to support the bridge die during manufacturing and testing. This carrier acts as a mediator that simplifies handling and integration of the complex bridge die structure, reducing manufacturing difficulty while enabling tighter pitch configurations.
2Ease of manufacture
If double-sided bridge dies with carrier are manufactured, then manufacturing complexity is reduced, but production cost increases
Solution Approach 1:
The bridge die is manufactured and tested on the carrier substrate before final device assembly. This preliminary action allows for early detection and correction of manufacturing defects, reducing rework costs and improving overall manufacturing efficiency despite the additional carrier material cost.
Solution Approach 2:
The carrier substrate is discarded after the bridge die is successfully transferred to the final device structure. While the carrier adds temporary cost, it enables simplified manufacturing processes that reduce overall production complexity and improve yield, resulting in net cost effectiveness for high-volume production.
3Productivity
If dual-sided conductive traces are implemented, then signal paths are doubled, but manufacturing precision requirements increase
Solution Approach 1:
The dual-sided conductive traces are segmented into distinct layers and patterns that can be manufactured using separate photolithography and deposition steps. This segmentation allows each layer to be optimized independently, maintaining manufacturing precision while achieving doubled signal path capacity.
Solution Approach 2:
Instead of increasing trace density in a single plane, the signal paths are extended into the third dimension by utilizing both sides of the bridge die. This dimensional approach doubles the effective signal path capacity without proportionally increasing the precision requirements for trace fabrication.
Data Source
AI summary
A semiconductor device is formed using a semiconductor wafer. A bridge die is formed over the semiconductor wafer including a first contact pad on a first surface of the bridge die and a second contact pad on a second surface of the bridge die opposite the first surface. The semiconductor wafer is attached to a first carrier. The semiconductor wafer and first carrier are singulated to separate the bridge die and a portion of the first carrier. The bridge die is disposed over a second carrier with the bridge die between the second carrier and the portion of the first carrier. The portion of the first carrier is removed after disposing the bridge die over the second carrier.