Chiplet Package Layout With BSPDN and Silicon Bridge Interconnect
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Solution Overview
Problem
Conventional semiconductor packages face limitations in miniaturization and interconnect efficiency, which hinders the integration of multiple chiplets and affects performance due to the placement of signal and power transmission structures on the substrate.
Innovation Solution
A semiconductor package design featuring a back side power delivery network (BSPDN) on each chiplet, with a silicon bridge for electrical coupling and dummy chiplets for enhanced heat dissipation, along with a redistribution layer substrate for efficient signal and power distribution, reduces the area and resistance of the BEOL structure, improving signal and power characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If signal and power transmission structures are placed on the substrate, then electrical coupling between chiplets is achieved, but the area and resistance of the BEOL structure increase
Solution Approach 1:
The patent moves the power transmission network from the front side (BEOL) to the back side of the substrate, utilizing the unused back side space. This dimensional relocation reduces the area occupied by power transmission structures on the front side while maintaining electrical coupling functionality through TSV connections that penetrate the substrate.
Solution Approach 2:
Instead of placing power transmission structures on the conventional front side of the substrate, the patent inverts the approach by positioning the power network on the back side. This inversion allows the BEOL structure to be minimized while achieving the same electrical coupling function through the substrate.
2Productivity
If multiple chiplets are integrated to improve performance, then device functionality is enhanced, but heat dissipation becomes more challenging
Solution Approach 1:
The patent extracts dummy chiplets from the functional device structure and positions them specifically for heat dissipation purposes. These dummy chiplets are integrated into the package but serve primarily as thermal management elements, allowing functional chiplets to be densely packed while heat dissipation is handled by dedicated thermal structures.
Solution Approach 2:
The dummy chiplets serve multiple functions: they occupy space for thermal management, provide additional heat dissipation pathways, and maintain structural integrity of the package, while the functional chiplets focus on device functionality. This multi-functionality allows simultaneous achievement of high integration and effective heat dissipation.
3Quantity of substance
If chiplet size is reduced to increase integration density, then more devices can be integrated, but manufacturing precision requirements increase
Solution Approach 1:
The patent divides the package into heterogeneous chiplets of different sizes and functions, allowing each chiplet to be optimized for its specific function rather than requiring all chiplets to be uniformly small. This segmentation enables higher overall integration density while maintaining manufacturable size ranges for individual chiplets.
Data Source
AI summary
A semiconductor package according to at least one embodiment may include: a first chiplet and a second chiplet disposed side by side with each other, wherein each of the first chiplet and the second comprises a substrate including an active side and a back side opposite to the active side; a back side power distribution network (BSPDN) in the back side of the substrate; and a third chiplet electrically coupling the first chiplet and the second chiplet to each other above the first chiplet and the second chiplet; and a fourth chiplet and a fifth chiplet disposed side by side with the third chiplet.