Chiplet-First Die Tiling on Stable Carriers to Limit Warpage
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Solution Overview
Problem
Current multi-die electronic packaging architectures face yield issues due to warpage and alignment inaccuracies during thermal compression bonding, particularly when integrating advanced node dies with lower node dies, leading to stringent warpage limitations and additional yield losses.
Innovation Solution
The proposed solution involves early placement of advanced process node first dies using a die mounter instead of a thermal compression bonding tool, utilizing a dimensionally stable carrier to minimize warpage, and forming mid-level interconnects before removing the carrier, thereby improving placement accuracy and reducing yield losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thermal compression bonding is used to attach advanced node dies to lower node dies, then die integration is achieved, but placement accuracy deteriorates due to warpage and tool limitations
Solution Approach 1:
The patent applies preliminary action by performing die placement on a dimensionally stable carrier before the carrier is removed and before subsequent packaging steps. The advanced node dies are placed on the carrier using a die mounter with high precision, and the carrier maintains dimensional stability throughout subsequent processing. This allows placement accuracy to be established early when the carrier is still providing mechanical support, avoiding the warpage issues that would occur if placement were attempted after carrier removal or on a less stable substrate.
2Manufacturing precision
If dimensionally stable carrier is used during early placement, then placement accuracy is improved, but device complexity increases due to additional carrier attach and removal steps
Solution Approach 1:
The dimensionally stable carrier serves multiple functions: it provides a mechanically stable platform for high-precision die placement, maintains dimensional stability during subsequent packaging processes, and acts as a temporary substrate that can be removed after serving its purpose. By making the carrier multi-functional, the patent justifies the additional process steps as necessary for achieving the precision requirements rather than unnecessary complexity.
3Adaptability or versatility
If advanced node dies are attached at later stages using TCB, then integration flexibility is improved, but yield deteriorates due to stringent warpage limitations
Solution Approach 1:
The patent performs die placement at an early stage while the dimensionally stable carrier is still in place, before subsequent packaging steps that would induce warpage. This preliminary placement action allows the use of a die mounter which provides higher precision than later-stage TCB tools. By placing dies early on the stable carrier, the patent achieves both high precision and maintains flexibility in subsequent integration steps.
Data Source
AI summary
Embodiments disclosed herein include electronic packages and methods of forming such electronic packages. In an embodiment, the electronic package comprises a mold layer having a first surface and a second surface opposite the first surface, and a plurality of first dies embedded in the mold layer. In an embodiment, each of the plurality of first dies has a surface that is substantially coplanar with the first surface of the mold layer. In an embodiment, the electronic package further comprises a second die embedded in the mold layer. In an embodiment, the second die is positioned between the plurality of first dies and the second surface of the mold layer.