Chiplet Interposer Segmentation for Integration Density
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Solution Overview
Problem
Current semiconductor packaging technologies face challenges in achieving high integration density and small footprint while maintaining cost-effectiveness, particularly in maintaining the planarity of large interposers and efficiently forming deep trench capacitors for enhanced capacitance density.
Innovation Solution
The formation of a Chip-On-Wafer (CoW) structure using a composite interposer with multiple smaller chiplet interposers embedded in molding material, where through vias are exposed and dielectric material is filled to create a redistribution structure for electrical connectivity, allowing for increased integration density and reduced manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a large interposer is used to achieve high integration density, then the integration density is improved, but the planarity control and manufacturing cost deteriorate
Solution Approach 1:
The patent divides a large interposer into multiple smaller chiplet interposers (first interposer, second interposer, etc.) that are laterally adjacent and individually manageable. Each chiplet interposer can be manufactured and planarized separately, avoiding the planarity issues of a single large interposer while achieving high integration density when assembled together.
2Quantity of substance
If a large interposer is used to achieve high integration density, then the integration density is improved, but the manufacturing cost deteriorates
Solution Approach 1:
The large interposer is segmented into multiple chiplet interposers that can be manufactured using standard, cost-effective processes. This segmentation allows for better utilization of existing manufacturing capabilities and reduces the need for expensive custom large-interposer fabrication processes.
Solution Approach 2:
Multiple chiplet interposers are embedded within a composite interposer structure that is surrounded by molding material. This nested arrangement allows efficient use of manufacturing space and materials while achieving high integration density.
3Quantity of substance
If deep trench capacitors are formed to enhance capacitance density, then the capacitance density is improved, but the manufacturing complexity increases
Solution Approach 1:
The deep trench capacitors are formed during the interposer fabrication process before the final assembly. The trenches are created, lined with conductive material, and filled with dielectric material as part of the interposer manufacturing sequence, integrating the capacitor formation into existing process steps rather than adding separate complex operations.
Data Source
AI summary
A method of forming a semiconductor structure includes bonding a first die and a second die to a first side of a first interposer and to a first side of a second interposer, respectively, where the first interposer is laterally adjacent to the second interposer; encapsulating the first interposer and the second interposer with a first molding material; forming a first recess in a second side of the first interposer opposing the first side of the first interposer; forming a second recess in a second side of the second interposer opposing the first side of the second interposer; and filling the first recess and the second recess with a first dielectric material.