Automotive Chiplet Link Resiliency With Feedback Bus Redundancy
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Solution Overview
Problem
Automotive-grade chiplets require enhanced resilience to meet safety standards like ASIL D, necessitating robust failure detection, indication, and transition to a safe state within specified time intervals, which existing technologies struggle to achieve efficiently.
Innovation Solution
Implementing a feedback mechanism with a monitoring bus to monitor link health, utilize redundant channels, and employ sequence numbers and CRC for error detection, enabling fast recovery and optimal data routing across functional channels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional communication channels are used between chiplets, then device complexity is reduced, but reliability deteriorates due to inability to meet ASIL D safety requirements
Solution Approach 1:
The communication interface is segmented into multiple independent channels (Channel 0 and Channel 1), each capable of carrying data packets with error detection codes. This segmentation allows the system to detect and recover from errors in individual channels without affecting overall communication reliability, enabling ASIL D compliance while maintaining manageable complexity through modular error handling
Solution Approach 2:
A feedback mechanism is implemented where the receiver chiplet monitors incoming packets for errors using CRC validation and sends status information back to the sender. This feedback loop enables automatic error detection and recovery, improving reliability through continuous monitoring while keeping the system complex only to the extent of implementing standard communication protocols
2Reliability
If error detection and recovery mechanisms are implemented, then reliability is improved, but loss of time increases due to error checking and retransmission
Solution Approach 1:
Cyclic Redundancy Check (CRC) error detection codes are pre-calculated and attached to data packets before transmission. This preliminary action allows the receiver to instantly validate packet integrity upon receipt without requiring complex post-reception analysis, minimizing error detection time while ensuring reliable error detection for ASIL D compliance
Solution Approach 2:
The system uses parallel communication channels and efficient error handling protocols that allow valid packets to be processed immediately while erroneous packets are quickly identified and retransmitted. This approach rushes through the error detection and recovery process by minimizing idle time and keeping the communication flow continuous, reducing overall time loss
3Reliability
If multiple communication channels are used for redundancy, then reliability is improved, but device complexity increases due to channel management
Solution Approach 1:
Multiple communication channels are merged into a unified communication framework that handles packet routing, error detection, and recovery through standardized protocols. This merging approach improves reliability by providing redundant paths while reducing complexity by consolidating channel management functions into a cohesive system rather than separate independent mechanisms
Data Source
AI summary
An apparatus is described and includes an integrated circuit (IC) package, the IC package comprising an automotive-grade IC package for automotive applications, the IC package comprising a first chiplet; a second chiplet electrically connected to the first chiplet via a plurality of communications channels; and a monitoring feedback bus for providing information regarding health of the communications channels from the second chiplet to the first chiplet.