Unified Chiplet Protocol Controller for Shared Bus Interfaces

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Solution Overview

Problem

The separate implementation of peripheral and inter-chip interconnection protocol controllers in chiplets leads to increased hardware resource occupation, design complexity, and cost, as well as power consumption issues.

Innovation Solution

A single protocol controller in a chiplet supports both peripheral and inter-chip interconnection protocols using two bus interfaces, sharing one interface for inter-chip interconnection and a partial sub-protocol of the peripheral protocol, while the other partial sub-protocol is implemented separately.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If separate peripheral protocol controller and inter-chip interconnection protocol controller are implemented, then protocol functionality is complete, but hardware resource occupation increases

Engineering Contradiction:

Improveprotocol functionalityVSAvoidhardware resource occupation

Core Design Contradiction:

Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The bus interface is designed to support multiple protocols including peripheral protocols (PCIe, CXL, NVLink) and inter-chip interconnection protocols (UCIe, NVLink) through a unified architecture. The interface can be configured to operate in different protocol modes, allowing a single controller to perform multiple protocol functions that traditionally required separate dedicated controllers.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If separate peripheral protocol controller and inter-chip interconnection protocol controller are implemented, then protocol functionality is complete, but design complexity increases

Engineering Contradiction:

Improveprotocol functionalityVSAvoiddesign complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent combines the peripheral protocol controller and inter-chip interconnection protocol controller into a single integrated controller. This merging eliminates the need for separate control units, reducing the overall design complexity while maintaining support for both protocol types through a unified control architecture.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The unified bus interface is designed with multi-functional capabilities to handle both peripheral and inter-chip protocols, reducing design complexity by avoiding duplication of protocol-specific control logic while maintaining protocol functionality through configurable interface modes.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If separate peripheral protocol controller and inter-chip interconnection protocol controller are implemented, then protocol functionality is complete, but cost increases

Engineering Contradiction:

Improveprotocol functionalityVSAvoidcost

Core Design Contradiction:

Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The integration of multiple protocol controllers into a single unified controller reduces manufacturing costs by decreasing the total component count, simplifying the manufacturing process, and reducing assembly complexity while maintaining support for both peripheral and inter-chip protocols.

Inventive Principle:

Principle #5Merging (Combining)

4Adaptability or versatility

If separate peripheral protocol controller and inter-chip interconnection protocol controller are implemented, then protocol functionality is complete, but power consumption increases

Engineering Contradiction:

Improveprotocol functionalityVSAvoidpower consumption

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The unified protocol controller reduces power consumption by consolidating multiple controller functions into a single integrated unit, eliminating redundant power consumption from separate controllers while maintaining support for both peripheral and inter-chip protocols through shared hardware resources.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentEP4660817A1Protocol controller, protocol control method, chiplet, system on chip, and elecronic device

Publication Date: 2025.12.10 HYGON INFORMATION TECH CO LTD

Figure 1A~2A
Figure 2B~4
Figure 5~6A

AI summary

Embodiments of the present disclosure provide a protocol controller, a protocol control method, a chiplet, a system on chip, and an electronic device; the protocol controller includes: a first bus interface connected with a system bus, in which the first bus interface is configured to implement an inter-chip interconnection protocol and a first partial sub-protocol of a peripheral protocol; and a second bus interface connected with the system bus, in which the second bus interface is configured to implement a second partial sub-protocol of the peripheral protocol, and the first partial sub-protocol and the second partial sub-protocol are configured to be implemented by different bus interfaces; and the chiplet uses either the inter-chip interconnection protocol or the peripheral protocol at the same time.