Multi-Chiplet Seal Ring Structure for Stress-Safe Electrical Interconnects
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Solution Overview
Problem
Existing methods for fabricating high-performance electronic devices from multiple chiplets face issues such as microcracks and contamination due to mechanical stress and debris during the dicing process, which can lead to defects and undesired electrical shorts.
Innovation Solution
The integration of seal rings in metal layers between chiplet surfaces and substrates, along with a third seal ring in a dielectric substrate overlaying the chiplets, combined with multi-level electrical connections, to prevent mechanical stress and debris, and enhance electrical conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If mechanical dicing is used to separate chiplets during manufacturing, then chiplet production is enabled, but microcracks and contamination occur due to mechanical stress and debris
Solution Approach 1:
The patent segments the monolithic chip into multiple chiplets that are kept connected through the seal ring structure during manufacturing, allowing them to be processed together as a unified structure while maintaining the ability to function as separate units. This segmentation approach enables production flexibility without requiring aggressive mechanical dicing that causes defects.
Solution Approach 2:
The seal ring structure is formed beforehand to provide mechanical cushioning and stress distribution during the dicing process. The seal ring acts as a protective element that absorbs and distributes mechanical stress, preventing microcracks from forming in the chiplet regions during separation.
2Reliability
If seal rings are formed in metal layers between chiplet surfaces and substrates, then mechanical stress and debris are prevented, but device complexity increases
Solution Approach 1:
The patent merges the seal ring function with the existing metal interconnect layers of the chiplet architecture. By forming seal rings within the metal layers that are already part of the electrical interconnection system, the design provides mechanical protection without adding separate protective structures, thus minimizing increased device complexity.
Solution Approach 2:
The metal layers serving as seal rings perform multiple functions simultaneously: they provide electrical interconnection between chiplets and substrates, offer mechanical strength and stress distribution, and create protective sealing barriers. This multi-functionality reduces the need for additional dedicated protective structures.
3Adaptability or versatility
If multiple chiplets are integrated with electrical connections, then bandwidth and routing options increase, but manufacturing precision requirements increase
Solution Approach 1:
The seal ring structures and electrical connection pathways are established in advance during the chiplet fabrication process, before final assembly. This preliminary formation of connection structures enables precise alignment to be achieved during manufacturing, as the connection points are pre-defined and can be accurately positioned during the dicing and assembly stages.
Data Source
AI summary
A package connecting first and second circuitry components includes: a semiconductor substrate, dielectric layers formed over the semiconductor substrate, first and second substrates of the first and second circuitry components, respectively, positioned side-by-side on one of the dielectric layers, first seal ring of the first circuitry component implemented in first metal layers embedded between the first substrate and a first surface of the first circuitry component, second seal ring of the second circuitry component implemented in second metal layers embedded between the second substrate and a second surface of the second circuitry component, and a third seal ring surrounds the first and second circuitry components and embedded in the dielectric layers extrinsic to the first and second metal layers and overlaying the first and second surfaces, at least a third section of the third seal ring disposed over first and second sections of the first and second seal rings, respectively.