Chiplet Storage Controller Segmentation for Yield and Time
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Solution Overview
Problem
The increasing size of silicon dies in storage devices leads to yield issues and longer back-end operation times due to complex performance and customer demand requirements, making it challenging to maintain efficiency and flexibility in storage controller design.
Innovation Solution
The implementation of a modular semiconductor design using chiplet technology, where a host block and media block are fabricated on separate silicon substrates and connected via a Universal Chiplet Interconnect Express (UCIe) interface, allowing for flexible configuration and reduced manufacturing time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the die size is increased to meet performance and customer demand requirements, then the functionality and performance of the storage controller are improved, but the yield decreases and manufacturing complexity increases
Solution Approach 1:
The storage controller is divided into multiple independent chiplets including a host interface chiplet and multiple media interface chiplets. Each chiplet can be manufactured separately on smaller dies, thereby maintaining high yield while achieving the overall performance and functionality of a larger integrated controller. The chiplets are then packaged together to form the complete storage controller.
2Device complexity
If the die size is increased to integrate more functions, then the device complexity is reduced, but the manufacturing time and back-end operation time increase
Solution Approach 1:
By segmenting the storage controller into separate host interface and media interface chiplets, each chiplet can be manufactured and tested independently in parallel, significantly reducing the overall back-end operation time compared to manufacturing a single large integrated die.
Solution Approach 2:
The chiplets are manufactured and prepared in advance as separate units, allowing for parallel processing and earlier completion of manufacturing steps. This preliminary segmentation enables faster assembly and reduces the total time required for back-end operations.
3Adaptability or versatility
If the die size is increased to accommodate more channels, then the adaptability to customer demands is improved, but the yield and ease of manufacture deteriorate
Solution Approach 1:
The media interface is divided into multiple media interface chiplets, each handling specific channels. This segmentation allows flexible configuration of channel numbers and types by selectively combining chiplets during packaging, while each individual chiplet remains manufacturable with high yield on smaller dies.
Solution Approach 2:
The chiplet architecture enables universal configurations where the same basic chiplet designs can be combined in different numbers and arrangements to meet various customer demands for channel configurations, eliminating the need to manufacture entirely different large-die designs for each configuration.
Data Source
AI summary
A storage controller includes a host block circuit formed at a first die and configured to communicate with a host device; and a plurality of media block circuits formed at at least one second die and configured to control a plurality of media devices. The plurality of media devices are configured to constitute a plurality of channels. Each of the plurality of media block circuits is connected to a corresponding channel of the plurality of channels. The host block circuit and the plurality of media block circuits are connected with each other through a chiplet interface.