Chipset Control Module for Concurrent Internal External Graphic Signal Processing

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Solution Overview

Problem

Conventional chipsets cannot process signals from internal and external graphic modules simultaneously due to the limitations of multiplexers, which leads to processing delays and reduced speed.

Innovation Solution

A chipset with a control module that divides graphic signals from both internal and external modules into sub-signals and outputs them simultaneously or separately, allowing for concurrent processing and flexible data length management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a multiplexer is used to process signals from internal and external graphic modules, then device complexity is reduced, but processing speed and simultaneous signal handling capability deteriorate

Engineering Contradiction:
Improvesignal processing structureVSAvoidgraphic signal processing speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent divides the single multiplexer into separate processing paths for internal and external graphic modules. The control module segments the signal flow by directing internal graphic module signals and external graphic module signals through different processing channels, eliminating the bottleneck of sequential multiplexing and enabling simultaneous processing of both signal types.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If signals from internal and external graphic modules are processed sequentially through a single multiplexer, then device complexity is reduced, but processing time and delay increase

Engineering Contradiction:
Improvesignal processing structureVSAvoidsignal processing delay
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The patent segments the signal processing into parallel paths: one path handles internal graphic module signals while another path handles external graphic module signals. This segmentation eliminates sequential processing delays by allowing both signal types to be processed concurrently through the control module, significantly reducing total processing time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The control module performs preliminary routing and preparation of signals from both internal and external graphic modules before they reach the output stage. By pre-organizing and preparing both signal streams in advance, the system minimizes waiting and switching delays that would occur with sequential multiplexer processing.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If a single multiplexer handles both internal and external graphic signals, then device complexity is reduced, but productivity and simultaneous processing capability deteriorate

Engineering Contradiction:
Improvesignal processing structureVSAvoidgraphic signal processing throughput
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent segments the monolithic multiplexer function into separate processing streams for internal and external graphic modules. This segmentation enables parallel processing operations where both signal types can be handled simultaneously by the control module, doubling the effective processing throughput compared to sequential multiplexer operation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges the processing capabilities for internal and external graphic modules into a unified control module that handles both signal types simultaneously. This merging of functions into a single intelligent controller eliminates the need for separate multiplexing stages while achieving higher combined throughput than sequential processing could provide.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS7948497B2Chipset and related method of processing graphic signals
Publication Date: 2011.05.24 VIA TECH INC
  • US7948497B2 patent drawing
  • US7948497B2 patent drawing
  • US7948497B2 patent drawing

AI summary

A chipset is electrically connected with an external graphic module, which generates a first graphic signal and outputs it to the chipset. The chipset includes an internal graphic module and a control module. The internal graphic module generates a second graphic signal, and the control module receives the first graphic signal and the second graphic signal. The control module divides the first graphic signal into at least two first graphic sub-signals and divides the second graphic signal into at least two second graphic sub-signals, respectively. When under a first output mode, the control module simultaneously outputs one of the first graphic sub-signals and one of the second graphic sub-signals.