Chipset Memory Sharing via Virtualization to Reduce Leakage
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Solution Overview
Problem
Current multiple chipset designs face challenges with power leakage and consumption due to scattered memory resources, which existing technologies have not effectively addressed.
Innovation Solution
A circuit design where multiple chipsets communicate via a communication channel, each with its own processor and memory unit, allowing processors to disengage their memory units and access those of other chipsets under the control of a main controller, thereby reducing power leakage and enhancing performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple chipsets each have their own separate memory units, then each chipset can operate independently, but power leakage increases due to scattered memory resources
Solution Approach 1:
The patent merges separate memory units from multiple chipsets into a unified shared memory resource accessible by all processors through a communication channel. This consolidation eliminates scattered memory resources that cause power leakage, while maintaining independent operation through virtualization and disengage/access mechanisms.
Solution Approach 2:
The patent introduces dynamic memory management where processors can disengage their local memory units and access remote memory units as needed. This dynamic switching allows the system to adapt memory allocation to actual computational needs, reducing power consumption when full local memory capacity is not required.
2Loss of energy
If processors access remote memory units through communication channels, then power leakage is reduced, but access time increases
Solution Approach 1:
The patent segments memory access operations into local and remote components. Processors first check local memory units for data, and only access remote memory units through communication channels when necessary. This segmentation minimizes the frequency of remote accesses, reducing the overall time penalty while maintaining power savings.
Solution Approach 2:
The patent implements preliminary actions by maintaining local memory units that can be quickly accessed for frequently used data. This preliminary local storage reduces the need for remote memory accesses, effectively preparing data in advance to minimize communication channel usage and access time delays.
Data Source
AI summary
Embodiments of the present invention provide an approach for memory and process sharing via input/output (I/O) with virtualization. Specifically, embodiments of the present invention provide a circuit design/system in which multiple chipsets are present that communicate with one another via a communications channel. Each chipset generally comprises a processor coupled to a memory unit. Moreover, each component has its own distinct/separate power supply. Pursuant to a communication and/or command exchange with a main controller, a processor of a particular chipset may disengage a memory unit coupled thereto, and then access a memory unit of another chipset (e.g., coupled to another processer in the system). Among other things, such an inventive configuration reduces memory leakage and enhances overall performance and/or efficiency of the system.