Chirp Frequency Linearity Measurement With Counter-TDC Tracking
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
There is a need for highly accurate real-time frequency linearity measurement of chirp signals in frequency-modulated continuous-wave (FMCW) radar systems, particularly in millimeter-wave applications, to ensure optimal system performance.
Innovation Solution
A radio-frequency integrated circuit (RFIC) with a phase-locked loop (PLL), frequency divider, counter, time-to-digital converter (TDC), and closed-loop frequency tracking circuit is used to measure frequency linearity by generating and tracking frequency errors in real-time, utilizing a combination of integer and fractional clock cycle estimates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If real-time frequency linearity measurement is implemented using both counter and TDC circuits, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The measurement circuit is segmented into two specialized sub-circuits: a counter circuit for measuring integer clock cycles and a TDC circuit for measuring fractional clock cycles. This segmentation allows each sub-circuit to be optimized for its specific measurement task, achieving high overall precision while keeping individual circuit complexities manageable
Solution Approach 2:
The system uses partial action by selectively employing the TDC circuit only when fractional cycle measurement is needed, while the counter handles integer cycle measurements. This selective use of measurement resources optimizes the balance between precision and complexity
2Reliability
If enhanced processing algorithms are always used to correct frequency non-linearity, then radar system performance is improved, but power consumption increases
Solution Approach 1:
The system performs self-service by using the measurement circuit to automatically detect frequency linearity deviations and trigger processing algorithms only when needed. This self-monitoring and selective correction approach maintains radar performance while minimizing unnecessary power consumption from continuous algorithm execution
Data Source
AI summary
A frequency linearity measurement circuit configured to measure a frequency linearity of a frequency signal includes: a first measurement circuit configured to generate a first estimate of an integer number of clock cycles of the frequency signal within a respective gate signal period of a gate signal; a second measurement circuit comprising a time-to-digital converter (TDC) configured to generate a second estimate of a fractional number of clock cycle of the frequency signal within the respective gate signal period; a reference measurement circuit configured to generate a third estimate of an expected number of clock cycles within the respective gate signal period; and a closed-loop frequency tracking circuit configured to track a frequency error between an expected frequency and a measured frequency, where the expected frequency and the measured frequency are determined based on the third estimate and on a sum of the first estimate and the second estimate, respectively.