Chopped Sensor ADC Offset Loop With Predictive Register Loading
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Solution Overview
Problem
Analog-to-digital converters (ADCs) face challenges with offset and low-frequency noise, leading to accuracy and resolution degradation, and existing offset cancellation techniques increase power consumption and system complexity, with complex interactions affecting signal-to-noise ratio and system dynamics.
Innovation Solution
A digital offset ripple loop for chopped sensor ADCs that predicts and loads estimated signal and/or offset values at modulation transition moments, combining SAR and ΣΔ modes for flexible operation, and uses a tracking register with prediction circuits like Kalman filters or moving averages to adapt to changing conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If complex analog circuitry or digital post-processing is used for offset cancellation, then offset and low-frequency noise are reduced, but power consumption and system complexity increase
Solution Approach 1:
The patent replaces complex analog offset cancellation circuitry with a digital offset ripple loop that operates in the digital domain. The modulation circuit modulates the input signal, and the digital feedback loop processes offset cancellation digitally, eliminating the need for complex analog cancellation circuits while maintaining offset reduction performance.
Solution Approach 2:
The patent introduces a digital feedback loop as an intermediary mechanism between the modulation circuit and the ADC. This digital feedback path processes offset cancellation separately from the main signal path, allowing complex offset compensation functionality to be added without increasing the complexity of the core analog signal path.
2Measurement precision
If settling time is extended for offset cancellation circuitry, then measurement accuracy is improved, but effective measurement time is reduced
Solution Approach 1:
The patent performs offset cancellation continuously in the background through the digital feedback loop during normal operation, rather than requiring a separate settling period before measurement. The prediction circuit anticipates offset variations and the feedback loop continuously compensates, so offset cancellation is already complete when measurement begins, eliminating the need for extended settling time.
Solution Approach 2:
The digital offset ripple loop operates continuously throughout the measurement cycle, maintaining offset cancellation without interruption. This continuous operation ensures that offset compensation is always active and up-to-date, eliminating the need to pause measurement for settling while maintaining both accuracy and productivity.
3Object-affected harmful factors
If chopping frequency is increased to reduce low-frequency noise, then noise performance is improved, but residual offset and ripple increase
Solution Approach 1:
The patent employs a digital feedback loop that continuously monitors the output of the modulation circuit and feeds back a corrected signal to cancel residual offset and ripple. This feedback mechanism dynamically compensates for the harmful effects of high-frequency chopping, allowing the system to operate at high chopping frequencies for noise reduction while simultaneously eliminating the resulting residual offset and ripple through active feedback cancellation.
Data Source
AI summary
An analog-to-digital converter (ADC) circuit includes a modulation circuit configured to modulate an input signal at a modulation frequency to generate a modulated signal; a combination circuit configured to combine the modulated signal with a feedback signal to generate a combined signal; a conversion circuit configured to convert, at a sampling frequency, the combined signal into a digital signal; a tracking register configured to store and update the digital signal; a prediction circuit configured to estimate a future value of the digital signal based on historical data from the digital signal, and load the estimated value into the tracking register at a modulation transition moment; a feedback circuit configured to convert a digital output signal of the tracking register into the feedback signal provided to the combination circuit; and a demodulation circuit configured to demodulate the digital signal at the modulation frequency to generate a digital demodulated output signal.