Chopped Comparator Relaxation Oscillator for Low-Voltage Accuracy

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Solution Overview

Problem

Integrated relaxation oscillators suffer from accuracy and stability issues due to non-ideal comparator characteristics, particularly offset voltages and propagation delays, which are exacerbated at low-voltage technology nodes, limiting their performance and suitability for low-voltage applications.

Innovation Solution

A delay and offset-voltage compensated relaxation oscillator circuit is designed with a chopped comparator unit and integrator units configured to cancel offset voltages by swapping comparator inputs between half-cycles, using identical components and logic units to generate clock signals, suitable for low-voltage operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a prior art relaxation oscillator is used, then the circuit can operate with fast start-up and low power consumption, but the output frequency accuracy and stability are limited by comparator offset voltages and propagation delays

Engineering Contradiction:
Improveoutput frequency accuracy and stabilityVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The oscillator circuit is divided into multiple identical integrator units (first, second, third integrator units) that operate in parallel. Each unit processes signals independently through its own comparator, allowing the system to achieve frequency accuracy through redundant processing and voting logic while maintaining the simple relaxation oscillator structure

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The circuit implements feedback through the logic unit that receives outputs from multiple comparators and generates control signals back to the integrator units. This feedback mechanism enables real-time compensation for comparator offset voltages and propagation delays by adjusting the integration based on detected frequency errors

Inventive Principle:
Principle #23Feedback

2Use of energy by stationary object

If the oscillator operates at low-voltage technology nodes (1.2V and below), then power consumption is reduced and integration is improved, but comparator non-ideal characteristics become more pronounced

Engineering Contradiction:
Improvepower consumptionVSAvoidcomparator performance
Core Design Contradiction:
Use of energy by stationary objectVSReliability

Solution Approach 1:

The circuit changes the operating parameters of the comparators by providing them with multiple reference voltages (first reference voltage and second reference voltage) instead of a single reference. This allows the comparators to operate effectively at low supply voltages while the logic unit processes outputs from multiple comparators to compensate for degraded comparator performance at low voltage nodes

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If multiple integrator units and comparators are added to compensate for offset and delay, then frequency accuracy improves, but circuit complexity increases

Engineering Contradiction:
Improvefrequency measurement accuracyVSAvoidnumber of components
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The circuit uses identical integrator units (first, second, and third integrator units) with matching components and configurations. This homogeneity ensures that all units contribute equally to frequency measurement and compensation, reducing the impact of component variations while maintaining predictable and accurate frequency generation despite the increased number of components

Inventive Principle:
Principle #33Homogeneity

Data Source

PatentUS20250211168A1Oscillator circuit
Publication Date: 2025.06.26 AUSTRIAMICROSYSTEMS AG
  • US20250211168A1 patent drawing
  • US20250211168A1 patent drawing
  • US20250211168A1 patent drawing

AI summary

An oscillator circuit is disclosed. The oscillator circuit comprises a first integrator unit, a second integrator unit, and a third integrator unit. The oscillator circuit also comprises a chopped comparator unit comprising first, second and third switching units and corresponding first, second and third comparators. The oscillator circuit also comprises a logic unit configured to receive a first comparator output from the first comparator, a second comparator output from the second comparator and a third comparator output from the third comparator; and use the first, second and third comparator outputs to generate input clock signals and measurement signals for controlling the integrator units and the switching units.