Differential Chopper Comparator With Symmetric Impedance Matching
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Solution Overview
Problem
The differential chopper comparator in existing A/D converters faces challenges in achieving highly accurate comparison results due to unequal impedance during the sample and hold operations, leading to incomplete cancellation of feedthrough noise, which affects the accuracy of the output.
Innovation Solution
A differential chopper comparator design with symmetric impedance configurations for the switches and capacitors, utilizing a first and second switch unit with equivalent impedance on both sides of the capacitors, and employing control signals to manage the sample and hold operations in a way that minimizes feedthrough by ensuring equal charge accumulation and discharge.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If switches are used for sample and hold operations in the differential chopper comparator, then the switching operation enables signal sampling and holding, but feedthrough noise is generated during switching which reduces comparison accuracy
Solution Approach 1:
The patent converts the harmful feedthrough noise into a beneficial effect by using correlated double sampling. The feedthrough noise generated during sampling is captured in the sampling capacitor and then subtracted during the comparison operation, transforming the noise from a harmful artifact into a cancelable component that improves comparison accuracy.
Solution Approach 2:
The patent introduces sampling capacitors as intermediary elements between the switches and the comparison circuit. These capacitors act as mediators that store the sampled signal along with the feedthrough noise, allowing subsequent separation and cancellation of the noise component through differential operation.
2Device complexity
If asymmetric impedance configuration is used in the sample and hold circuit, then the circuit design is simpler, but feedthrough noise cancellation is incomplete which reduces output accuracy
Solution Approach 1:
The patent deliberately introduces asymmetric impedance elements (different resistance values) in the sample and hold circuits of the two comparators. This asymmetric configuration is designed to create unequal feedthrough noise that can be compensated through digital processing, ultimately achieving complete noise cancellation while maintaining circuit simplicity.
Solution Approach 2:
The patent implements a feedback mechanism where the output signals from both comparators are fed into a digital processor that calculates the difference between them. This feedback loop allows the system to detect and cancel the feedthrough noise component, ensuring high comparison accuracy even with asymmetric impedance configurations.
3Adaptability or versatility
If different impedance values are used for switches on either side of capacitors, then the circuit design flexibility is improved, but unequal charge accumulation occurs during sampling which degrades output accuracy
Solution Approach 1:
The patent changes the impedance parameters of the switches and introduces compensating resistance elements to balance the total impedance seen by each capacitor during sampling. By adjusting these parameters, the system maintains design flexibility while ensuring equal charge accumulation in both capacitors, which is critical for accurate differential comparison.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables the differential chopper comparator to output highly accurate comparison results by effectively canceling out feedthrough noise, ensuring consistent impedance across capacitors and improving the overall accuracy of the A/D converter.
Implementation Method 1
The capacitors C11 and C12 hold electrical charges when the input signal voltage Vin and the reference voltage Vref, which are respectively supplied to the capacitors C11 and C12, are connected to the capacitors C11 and C12
Implementation Method 2
The differential chopper comparator cancels out the influence of the switching noise (feedthrough) generated from the switches S11, S12, S13, S14, S16, and S17 at the time of switching between the sample operation (reset operation) and the hold operation (comparison operation)
Data Source
AI summary
A differential chopper comparator compares an input signal voltage and a first voltage, and includes a first capacitor, a second capacitor, and a differential amplification unit including a differential amplification circuit. Either the input signal voltage or the first voltage is applied to one end of the first capacitor via a first switch unit. A fixed voltage is applied to one end of the second capacitor via a second switch unit. Either a non-inverting input terminal or an inverting input terminal of the differential amplification circuit is connected to the other end of the first capacitor, and the other terminal is connected to the other end of the second capacitor. An impedance of the first switch unit side viewed from one end of the first capacitor and an impedance of the second switch unit side viewed from one end of the second capacitor are substantially same.