Chopper-Stabilized Oscillator Circuit for Predictable Clock Frequency

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Solution Overview

Problem

Conventional relaxation oscillators rely on comparator offset voltage, leading to unstable and temperature-dependent output frequencies, which are further affected by supply voltage variations, making them unsuitable for modern electronic circuits requiring stable and predictable clock signals.

Innovation Solution

An oscillator circuit arrangement incorporating a switched capacitor circuit, a chopper circuit, and a buffer circuit, where the chopper circuit cancels the comparator's offset voltage influence, and the buffer circuit generates a stable output clock signal independent of comparator offset, relying mainly on resistor and capacitor parameters and switching delays.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional relaxation oscillators use comparator offset voltage for frequency determination, then the oscillator can be fully integrated without external components, but the output frequency becomes unstable and temperature-dependent

Engineering Contradiction:
Improvefull integration capabilityVSAvoidoutput frequency stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces a chopper circuit as an intermediary between the switched capacitor circuit and the comparator. This chopper circuit modulates the comparator offset voltage to a higher frequency where it can be filtered out, effectively eliminating the harmful offset voltage influence on the output frequency while maintaining full integration capability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the operating parameters by using auto-zeroing techniques that dynamically adjust the comparator offset voltage to zero at critical moments in the oscillation cycle. This parameter change eliminates the static offset voltage problem while preserving the integrated design

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If the oscillator frequency depends on comparator offset voltage, then the circuit design is simplified, but the frequency becomes individual to every oscillator and unpredictable

Engineering Contradiction:
Improvecircuit design simplicityVSAvoidfrequency predictability
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent implements feedback mechanisms where the output signal is fed back to adjust the comparator offset voltage dynamically. This feedback loop ensures that the offset voltage is compensated in real-time, making the output frequency predictable and consistent across different oscillators while maintaining relatively simple circuit design

Inventive Principle:
Principle #23Feedback

3Speed

If conventional designs use switching elements to control capacitor connections, then the oscillator can operate at low frequencies, but the output frequency becomes sensitive to supply voltage variations

Engineering Contradiction:
Improveoperating frequency rangeVSAvoidsupply voltage insensitivity
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The chopper circuit acts as an intermediary that isolates the switched capacitor circuit from supply voltage variations. By modulating the signals at a higher frequency and using differential processing, the chopper circuit eliminates the direct coupling between supply voltage and output frequency, allowing low-frequency operation with improved supply voltage insensitivity

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12113479B2Oscillator circuit arrangement
Publication Date: 2024.10.08 AUSTRIAMICROSYSTEMS AG
  • US12113479B2 patent drawing
  • US12113479B2 patent drawing
  • US12113479B2 patent drawing

AI summary

An oscillator circuit arrangement includes a switched capacitor circuit at least one capacitor selectively coupled to one of a supply terminal and a terminal for ground potential. A chopper circuit is disposed between the switched capacitor circuit and a comparator. The chopper circuit selectively couples one of input terminals and a reference potential terminal to its output terminals. A buffer circuit is coupled to the output of the comparator circuit. The buffer circuit is connected to the switched capacitor circuit and to the chopper circuit to control selective coupling operations therein.