Chroma Block Merging for Video Decoder Hardware Complexity Reduction
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Solution Overview
Problem
Existing video compression methods face challenges in efficiently coding chroma samples, particularly in reducing hardware complexity and achieving compact representation, due to the generation of chroma prediction blocks with sizes less than 4 pixels along each side, which is suboptimal for hardware efficiency.
Innovation Solution
The method involves merging chroma blocks with dimensions less than a threshold into larger blocks with at least 4 pixels along each side for prediction, using a decoder to derive prediction information and generate reconstructed chroma samples, thereby reducing hardware complexity and improving representation efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If chroma blocks are kept at small sizes (less than 4 pixels along each side), then the representation precision is improved, but the device complexity increases
Solution Approach 1:
The patent merges multiple small chroma blocks (each less than 4 pixels along each side) into a single larger merged block that is at least 4 pixels along each side. This merging operation reduces the number of separate prediction blocks, thereby reducing hardware complexity while maintaining adequate chroma representation precision through the merging of adjacent small blocks.
2Device complexity
If chroma blocks are merged into larger blocks, then the device complexity is reduced, but the measurement precision deteriorates
Solution Approach 1:
The patent merges multiple small chroma blocks into a larger merged block to reduce hardware complexity. The merging is performed on adjacent small blocks that collectively maintain adequate chroma representation, thus reducing the number of separate processing units while preserving necessary precision.
3Manufacturing precision
If chroma prediction blocks with sizes less than 4 pixels along each side are generated, then the manufacturing precision is improved, but the ease of manufacture deteriorates
Solution Approach 1:
The patent merges multiple small chroma blocks (less than 4 pixels along each side) into a larger merged block (at least 4 pixels along each side). This merging simplifies hardware implementation by reducing the number of separate prediction blocks and associated processing logic, while the precise merging of adjacent small blocks maintains adequate chroma representation precision.
Data Source
Figure 1A~1E
Figure 2
Figure 3~4C
AI summary
A decoder and a method to process chroma blocks by the decoder are described. The method includes receiving a coding block from an encoder; partitioning the coding block into a plurality chroma blocks; merging at least two chroma blocks among the plurality chroma blocks into a merged block, where a width or height of a chroma block among the at least two chroma blocks is less than a threshold, and a width or height of the merged block is no less than the threshold; deriving prediction information for the merged block; generating prediction samples according to the derived prediction information; and obtaining reconstructed chroma samples according to the generated prediction samples. By merging the at least two chroma blocks, whose width or height is less than a threshold, into the merged block, hardware complexity can be reduced.