4th-Order CIFF SAR ADC With Shared Amplifiers for Low-Power Noise Shaping

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Solution Overview

Problem

Existing Noise Shaping SAR ADCs face challenges in achieving high-order noise shaping with low power consumption and robustness against Process, Voltage, and Temperature (PVT) variations, while maintaining a simple structure.

Innovation Solution

A high-order noise shaping SAR ADC is implemented using a Cascade of Integrators with Feed-Forward (CIFF) structure with a 4th-order noise transfer function, utilizing two amplifiers and a CIFF circuit with two cascaded second-order CIFF circuits, and a dynamic integrator network.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If high-order noise shaping is implemented using traditional CIFF architecture, then noise shaping performance is improved, but power consumption increases due to requiring more amplifiers

Engineering Contradiction:

Improvenoise shaping performanceVSAvoidpower consumption

Core Design Contradiction:

Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent merges multiple amplifiers into a shared amplifier structure where a single amplifier serves multiple integration stages through time-multiplexed operation. The amplifier is shared between different integrators in the CIFF architecture, reducing the total amplifier count from O(n) to O(1) while maintaining 4th-order noise shaping performance.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces dynamic switching mechanisms that allow the amplifier to dynamically serve different integration stages at different time periods. The system transitions from a static one-to-one amplifier-integrator mapping to a dynamic time-multiplexed sharing arrangement, enabling high-order noise shaping with reduced hardware resources.

Inventive Principle:

Principle #15Dynamics

2Measurement precision

If high-order noise shaping is implemented, then noise transfer function performance is improved, but circuit complexity increases

Engineering Contradiction:

Improvenoise transfer function performanceVSAvoidcircuit complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The patent combines multiple amplifier functions into a single shared amplifier, merging what would traditionally be separate amplification stages into one unified component that operates at different times for different integrators, thereby reducing circuit complexity while preserving 4th-order noise shaping capability.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The shared amplifier is designed to perform multiple functions by serving different integration stages at different time periods. This universal amplifier structure replaces multiple specialized amplifiers, reducing overall circuit complexity while maintaining the required noise shaping performance.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Ease of manufacture

If EF architecture is used, then implementation ease is improved, but PVT robustness deteriorates due to sensitivity to Process, Voltage, and Temperature variations

Engineering Contradiction:

Improveimplementation easeVSAvoidPVT robustness

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces an intermediate feedback mechanism that mediates between the EF architecture's simplicity and PVT robustness requirements. The additional feedback path acts as an intermediary that compensates for PVT variations, allowing the system to maintain robustness while preserving the implementation ease of EF architecture.

Inventive Principle:

Principle #24Intermediary (Mediator)

4Measurement precision

If more amplifiers are added to achieve higher noise shaping order, then noise shaping performance is improved, but device complexity increases

Engineering Contradiction:

Improvenoise shaping orderVSAvoidnumber of amplifiers

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the functions of multiple amplifiers into a single shared amplifier that operates in a time-multiplexed manner, combining what would traditionally require separate amplification stages into one unified component, thereby achieving high-order noise shaping with reduced device complexity.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The system employs dynamic time-multiplexed operation where a single amplifier dynamically serves multiple integration stages at different times, transitioning from a static multi-amplifier architecture to a dynamic single-amplifier architecture, reducing the number of amplifiers while maintaining high noise shaping order.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS12512845B2High-order noise-shaping successive approximation register (SAR) analog-to-digital converter and method thereof

Publication Date: 2025.12.30 UPBEAT TECH CO LTD

AI summary

A Successive Approximation Register Analog-to-Digital Converter (SAR ADC) comprises: a plurality of switch capacitor arrays, used to sample an analog input signal; a noise shaping circuit including a fourth-order CIFF (Cascade of Integrators with Feed-Forward) loop filter having two second-order cascaded CIFF loop filters, in the fourth-order CIFF loop filter, a first-order extraction capacitor and a second-order extraction capacitor sharing a first amplifier, and a third-order extraction capacitor and a fourth-order extraction capacitor sharing a second amplifier; a comparator for comparing a plurality of output signals from the noise shaping circuit to produce a plurality of comparison results; and a logic circuit for generating a digital output signal and controlling the switch capacitor arrays based on comparison results from the comparator.