Computing-in-Memory Boolean Logic Circuits With Fewer Transistors

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Solution Overview

Problem

The Von Neumann architecture's separation between storage and processing units leads to inefficiencies in power consumption and speed, limiting the development of high-speed and low-power processors, especially in applications requiring high memory access and parallelism.

Innovation Solution

Implementing Boolean logic using computing-in-memory transistors with a basic unit consisting of a computing-in-memory transistor and a pull resistor, where the gate voltage and threshold voltage are modulated to perform various logic operations, reducing circuit area and optimizing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional Von Neumann architecture is used with separate storage and processing units, then data transmission between storage and process units is frequent, but system power consumption increases and speed decreases

Engineering Contradiction:
Improvecomputing speedVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent merges storage and processing functions into a single integrated structure by implementing Boolean logic operations directly within the memory unit. The computing-in-memory transistor performs both data storage and logic operations in the same physical location, eliminating the need for data transmission between separate storage and processing units, thereby reducing power consumption and improving computing speed.

Inventive Principle:
Principle #5Merging (Combining)

2Area of stationary object

If computing-in-memory transistors are used to implement Boolean logic, then circuit area is reduced and power consumption is optimized, but device complexity increases

Engineering Contradiction:
Improvecircuit areaVSAvoiddevice complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The computing-in-memory transistor serves multiple functions simultaneously: it acts as a storage element, a logic operation unit, and a data processing component. By making the transistor universal and multi-functional, the patent reduces the overall circuit area while managing complexity through functional integration rather than adding separate dedicated components for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables efficient implementation of Boolean logic operations with fewer transistors, reducing circuit area and power consumption, thereby improving computing speed and energy efficiency.

Implementation Method 1

the threshold voltage modulation of the computing-in-memory transistor can change the AND/OR logic relationship of A and B

Methodology Applied
Scientific EffectThreshold voltage modulation:

Implementation Method 2

a gate voltage Vin, of the computing-in-memory transistor represents an input B of the basic unit

Methodology Applied
Scientific EffectGate voltage modulation:

Data Source

PatentUS12166481B2Method, unit and circuit for implementing Boolean logic based on computing-in-memory transistor
Publication Date: 2024.12.10 ZHEJIANG LAB
  • US12166481B2 patent drawing
  • US12166481B2 patent drawing
  • US12166481B2 patent drawing

AI summary

A method, a unit and circuits for implementing Boolean logics based on computing-in-memory transistors. The method is implemented by using the characteristics and the read-write mode of the computing-in-memory transistor; the basic unit consists of a computing-in-memory transistor and a pull resistor; the pull resistor in the basic unit is connected in series with the transistor, and the gate of the transistor is independent; the basic units can implement sixteen Boolean logic operations through different circuit structures and voltage configuration schemes. Compared with the logic circuit structure of the conventional CMOS transistors, the present disclosure can implement more logic operations with fewer transistors, which greatly optimizes circuit density and computing speed caused by data transmission between storage units and process units.