CIM Memory Current Readout Using DAC Comparison and Clock Gating
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Solution Overview
Problem
Conventional compute-in-memory (CIM) circuits face challenges in high-speed operations due to high power consumption and increased manufacturing costs, as they rely on voltage signals and require large static currents, and often employ clamping circuits to ensure even cell currents.
Innovation Solution
The solution involves computing current signals from a CIM memory circuit by comparing them with reference currents generated by a current digital-to-analog converter (DAC) circuit, using clock-gated switches to produce even currents and reduce static power consumption, and employing a current comparator to generate an output signal indicative of the difference between the two currents, which is then adjusted by a logic circuit to match the memory current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If voltage signals and large static currents are used in conventional CIM circuits, then computing operations can be performed, but power consumption increases and manufacturing costs increase
Solution Approach 1:
The patent replaces voltage-based computing with current-based computing. Current signals are used throughout the memory circuit to perform computing operations, eliminating the need for voltage signals and large static currents. This substitution of the signal type (from voltage to current) directly reduces power consumption while maintaining computing functionality.
Solution Approach 2:
The patent changes the fundamental parameter used for computing from voltage to current. By using current signals instead of voltage signals, the system achieves lower power consumption because current-based operations in the memory circuit do not require the large static currents needed by conventional voltage-based CIM circuits.
2Stability of the object's composition
If clamping circuits are employed to ensure even cell currents, then current uniformity is improved, but device complexity and manufacturing costs increase
Solution Approach 1:
The patent employs clock-gated switches that automatically regulate current distribution through the memory cells. These switches are controlled by clock signals and inherently balance the current across cells without requiring external clamping circuits. The system self-regulates current uniformity through the timing and gating mechanism, eliminating the need for additional clamping circuitry.
Solution Approach 2:
The patent uses clock-gated switches that operate periodically based on clock signals to control current flow through memory cells. This periodic gating action naturally balances and equalizes the current across different cells over time, achieving current uniformity without requiring static clamping circuits. The rhythmic switching ensures even current distribution as a byproduct of the periodic operation.
Data Source
AI summary
In a compute-in-memory (“CIM”) system, current signals, indicative of the result of a multiply-and-accumulate operation, from a CIM memory circuit are computed by comparing them with reference currents, which are generated by a current digital-to-analog converter (“DAC”) circuit. The memory circuit can include non-volatile memory (“NVM”) elements, which can be multi-level or two-level NVM elements. The characteristic sizes of the memory elements can be binary weighted to correspond to the respective place values in a multi-bit weight and/or a multi-bit input signal. Alternatively, NVM elements of equal size can be used to drive transistors of binary weighted sizes. The current comparison operation can be carried out at higher speeds than voltage computation. In some embodiments, simple clock-gated switches are used to produce even currents in the current summing branches. The clock-gated switches also serve to limit the time the cell currents are on, thereby reducing static power consumption.