CIM Memory Readout with Current DAC Feedback and Pulsed Cell Currents
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional compute-in-memory (CIM) circuits face challenges in high-speed operations due to high power consumption and increased manufacturing costs, as they rely on voltage signals and require large static currents, along with the need for clamping circuits to ensure even cell currents.
Innovation Solution
The solution involves computing current signals from a CIM memory circuit by comparing them with reference currents generated by a current digital-to-analog converter (DAC) circuit, using clock-gated switches to produce even currents and reduce static power consumption, and employing a current comparator to generate an output signal indicative of the difference between the two currents, with a logic circuit adjusting the reference current to match the memory current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If voltage signals and large static currents are used in conventional CIM circuits, then computing operations can be performed, but power consumption increases and manufacturing costs increase
Solution Approach 1:
The patent changes the signal type from voltage to current, and modifies the current waveform from static to pulsed. By using pulsed current signals instead of large static currents, the system maintains computing operation capability while significantly reducing power consumption, as the current flows only during necessary computation windows rather than continuously
Solution Approach 2:
The patent implements periodic pulsed current signals to perform computing operations. Instead of using continuous static current, the system applies current in periodic pulses synchronized with memory access operations, enabling computing functionality while reducing average power consumption through the intermittent nature of the current flow
2Stability of the object's composition
If clamping circuits are added to ensure even cell currents, then current uniformity is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent removes the clamping circuits from the system entirely. Instead of adding complexity to ensure current uniformity, the invention achieves even cell currents through the inherent properties of the pulsed current signaling and memory cell architecture, eliminating the need for additional clamping components and reducing overall device complexity
Solution Approach 2:
The system achieves current uniformity through self-regulating mechanisms inherent in the pulsed current approach and memory cell design, without requiring external clamping circuits. The pulsed signaling naturally produces even current distribution across cells, allowing the system to self-regulate current uniformity without additional complexity
3Productivity
If conventional voltage-based CIM operations are used, then computing can be performed, but manufacturing cost increases
Solution Approach 1:
The patent substitutes the voltage-based computing mechanism with a current-based mechanism. This substitution simplifies the manufacturing process by eliminating the need for precise voltage regulation and clamping circuit fabrication, reducing manufacturing complexity and cost while maintaining computing operation capability through current-mode logic
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables high-speed (GHz) CIM operations, reduces manufacturing costs by eliminating the need for clamping circuits, and minimizes power consumption by limiting static current flow, while maintaining even current levels.
Implementation Method 1
a current comparator adapted to compare levels of the first and second currents and generate an output signal
Implementation Method 2
a logic circuit adapted to adjust the second current based on the output signal from the current comparator
Data Source
AI summary
In a compute-in-memory (“CIM”) system, current signals, indicative of the result of a multiply-and-accumulate operation, from a CIM memory circuit are computed by comparing them with reference currents, which are generated by a current digital-to-analog converter (“DAC”) circuit. The memory circuit can include non-volatile memory (“NVM”) elements, which can be multi-level or two-level NVM elements. The characteristic sizes of the memory elements can be binary weighted to correspond to the respective place values in a multi-bit weight and/or a multi-bit input signal. Alternatively, NVM elements of equal size can be used to drive transistors of binary weighted sizes. The current comparison operation can be carried out at higher speeds than voltage computation. In some embodiments, simple clock-gated switches are used to produce even currents in the current summing branches. The clock-gated switches also serve to limit the time the cell currents are on, thereby reducing static power consumption.