Compute-in-Memory Architecture Resolving Von Neumann Bottleneck

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Solution Overview

Problem

Current computing architectures face limitations in speed due to the Von Neuman bottleneck, particularly in high-performance computing applications like AI and deep learning, which rely heavily on matrix multiplications.

Innovation Solution

The proposed solution involves a compute-in-memory (CiM) architecture that integrates processing capabilities directly within the memory system, allowing for faster data processing and bypassing traditional memory access limitations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If traditional memory access architecture is used, then system simplicity is maintained, but computation speed is limited by the Von Neuman bottleneck

Engineering Contradiction:
Improvecomputation speedVSAvoidmemory architecture complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent merges memory storage and computation processing into a single integrated structure. Memory cells are configured to perform computational operations (such as multiplication and accumulation) directly within the memory array, eliminating the need for separate processing units and data transfer mechanisms. This integration resolves the Von Neuman bottleneck by allowing simultaneous storage and computation, thereby improving computation speed while accepting increased architectural complexity.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If compute-in-memory architecture is implemented, then computation performance is enhanced, but device complexity increases

Engineering Contradiction:
Improvecomputation performanceVSAvoidmemory system complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory cells are designed with multi-functionality, serving both as storage units and computation units. The same memory infrastructure performs dual roles: storing data and executing computational operations. This universal design improves computation performance by eliminating data movement overhead while managing complexity through shared hardware resources rather than separate specialized components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory system performs computation operations autonomously within the memory array without requiring external processing intervention. Computational tasks are executed in-place using the stored data itself, allowing the memory system to serve its own computational needs. This self-service capability enhances productivity by reducing dependency on external processors while containing complexity within the memory subsystem.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20250118345A1Memory system and operating method of memory system
Publication Date: 2025.04.10 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250118345A1 patent drawing
  • US20250118345A1 patent drawing
  • US20250118345A1 patent drawing

AI summary

Memory systems and operating method of a memory system are provided. The memory system utilized for performing a computing-in-memory (CiM) operation comprises a memory array and a processing circuit. The memory array comprises a plurality of memory cells. The processing circuit is coupled to the memory array and comprises a programming circuit and a control circuit. The programming circuit is coupled to the memory array and configured to perform a write operation for programming electrical characteristics of the memory cells. The control circuit is coupled to the programming circuit and configured to: receive a plurality of weight data corresponding to a plurality of weight values; and control the write operation performed by the programming circuit, so the electrical characteristics of the memory cells are programmed following a sequential order of the weight values.