Compute-in-Memory Weight Buffer for Single-Cycle Weight Updates
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Solution Overview
Problem
Existing compute-in-memory (CIM) systems suffer from low weight update efficiency, requiring N+1 clock cycles to update an entire weight set due to channel-first write operations.
Innovation Solution
Implementing a memory device with a first weight buffer and write driver circuit to write one weight set into the buffer during a single write clock cycle, utilizing multiplier circuits and adder trees to perform partial product calculations, and incorporating a multiple row weight buffer for simultaneous updates across rows.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If channel-first write operations are used to update weights in CIM systems, then the memory structure can be efficiently utilized, but the weight update efficiency deteriorates requiring N+1 clock cycles to update an entire weight set
Solution Approach 1:
The weight buffer is segmented into multiple rows, with each row capable of storing a complete weight set. This segmentation allows parallel writing operations to different rows simultaneously, enabling the entire weight set to be updated in a single clock cycle rather than requiring N+1 sequential operations.
Solution Approach 2:
The patent transitions from a single-dimensional weight storage approach to a two-dimensional structure with multiple rows. This dimensional change enables simultaneous write operations across different rows, fundamentally improving the weight update throughput from sequential to parallel execution.
2Device complexity
If sequential weight updates are performed one weight at a time, then the circuit complexity remains low, but the update time increases requiring N+1 clock cycles
Solution Approach 1:
Multiple weight sets are pre-loaded into different rows of the weight buffer before computation begins. This preliminary action ensures that all weights are readily available in the buffer, eliminating the need for sequential updates during computation and reducing the overall update time to a single clock cycle.
Solution Approach 2:
The patent combines multiple weight sets into a single weight buffer structure with multiple rows. This merging allows the system to handle multiple weights simultaneously through parallel write operations, reducing the total update time while maintaining manageable circuit complexity through shared infrastructure.
3Ease of operation
If weight sets are stored in memory array and read out for computation, then data accessibility is improved, but the weight update efficiency deteriorates due to the need to write weights into buffer during clock cycles
Solution Approach 1:
The weight buffer acts as an intermediary between the memory array and the computation units. By pre-loading complete weight sets into the buffer's multiple rows, the system enables simultaneous access to all weights during computation while allowing weight updates to occur in parallel across different rows, thus improving both data accessibility and update efficiency.
Data Source
AI summary
A device includes a memory array to store a plurality of weight sets and read circuits to read the plurality of weight sets. A first weight buffer is to store a first weight set of the plurality of weight sets and a write driver circuit is to write the first weight set into the first weight buffer during a single write clock cycle. A plurality of first multiplier circuits receives the first weight set from the first weight buffer and a first data input set of data input channels 0-N. Each of the first multiplier circuits is to receive a corresponding first weight of the first weight set and a first data input of the first data input set and to multiply the first weight and the first data input to provide a partial product. An adder tree is to sum the partial products and provide an accumulated result.