Compute-in-Memory Weight Compression for Lower-Power Memory Circuits
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Solution Overview
Problem
As semiconductor integrated circuits (ICs) become smaller and more complex, the resistance of conductive lines affects operating voltages and overall IC performance, particularly in memory macros, necessitating improved power efficiency and reduced processing requirements.
Innovation Solution
A memory circuit incorporating a compute-in-memory (CIM) array that compresses weight data into delta form, reducing processing and memory resource usage through an encoder and decoder configuration, enabling efficient vector multiplication and decompression.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If traditional vector MAC units are used for processing, then computing accuracy is maintained, but power consumption increases and memory resource usage increases
Solution Approach 1:
The patent merges computation and memory functions into a single compute-in-memory array, where weight data is stored directly in memory cells and multiplication operations are performed through analog current modulation during read operations. This eliminates the need for separate MAC units and reduces power consumption by minimizing data movement between memory and processing units.
Solution Approach 2:
The patent replaces digital mechanical processing (traditional MAC unit operations) with analog electrical processes. Weight values are encoded as conductance levels in memory cells, and multiplication is achieved through Ohm's law current modulation during read operations, eliminating the need for digital computation hardware.
2Quantity of substance
If weight data is compressed into delta form, then memory capacity increases and processing is reduced, but decompression processing is required
Solution Approach 1:
The patent transforms weight data from full-precision format to compressed delta form by calculating differences between consecutive weight values. This parameter transformation reduces the number of bits required to represent weight data, increasing effective memory capacity while enabling analog computation with reduced precision requirements.
Solution Approach 2:
The patent performs delta compression of weight data before storing it in the memory array. By pre-processing the weight data into differential form, the system reduces memory resource requirements and enables more efficient analog computation, with the understanding that decompression will be performed during the read operation.
3Volume of moving object
If IC size is reduced, then device integration increases, but conductive line resistance increases affecting operating voltages
Solution Approach 1:
The patent replaces digital voltage-based computation with analog current-based computation. By using current modulation through memory cell conductances to perform multiplication operations, the system becomes less sensitive to voltage drops caused by increased line resistance in scaled-down ICs, improving reliability in miniaturized devices.
Data Source
AI summary
A memory circuit includes a compute in-memory (CIM) array. The CIM array includes a memory cell array configured to store a first set of data. The first set of data including a first set of weights or a second set of data. The first set of data being exponent portions of corresponding floating point numbers. The second set of data being a compressed version of the first set of weights. The first set of weights having a first data length, and the second set of data having a second data length less than the first data length. The CIM array further includes a decoder coupled to the memory cell array, and being configured to generate a first set of output signals in response to a first set of input signals, the first set of data and a flag signal.