Hardware-Software Cipher Masking for Physical Attack Resistance
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Solution Overview
Problem
Existing symmetrical cipher algorithms are vulnerable to physical attacks and require significant hardware resources, limiting their efficiency and compactness.
Innovation Solution
Implementing symmetrical cipher algorithms using data masking and unmasking operations in hardware, linear operations in software, and non-linear operations in software or hardware, with mask refreshment operations after each non-linear step, utilizing lookup tables for efficient execution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If symmetrical cipher algorithms are implemented using traditional hardware approaches, then security protection is provided, but hardware resources are significantly consumed and the device becomes less compact
Solution Approach 1:
The cipher algorithm is segmented into distinct operational components: linear operations executed by a CPU in software, non-linear operations handled by dedicated hardware circuits, and masking operations managed by separate hardware modules. This segmentation allows each component to be optimized independently, reducing overall hardware resource consumption while maintaining security.
Solution Approach 2:
Masking operations are introduced as an intermediary mechanism between the linear and non-linear operations. The masking hardware module processes data intermediarily, adding security layers without requiring the entire cipher implementation to be in hardware. This mediator approach enhances security while keeping hardware resources localized to specific functions.
2Productivity
If symmetrical cipher algorithms are implemented with comprehensive hardware support, then processing speed is improved, but hardware circuit size increases and compactness is reduced
Solution Approach 1:
Processing functions are segmented between software-based linear operations and hardware-accelerated non-linear operations. The CPU handles linear transformations in software, while dedicated hardware circuits only implement the computationally intensive non-linear operations and masking functions. This selective hardware implementation improves processing speed for critical path operations without proportionally increasing overall hardware circuit size.
Solution Approach 2:
Instead of implementing the entire cipher algorithm in hardware, only the essential speed-critical components (non-linear operations and masking) are implemented in hardware. The remaining linear operations are efficiently handled by software, providing partial hardware acceleration that improves speed without the excessive hardware overhead of full hardware implementation.
3Productivity
If more hardware resources are allocated to cipher algorithm implementation, then processing capability is enhanced, but the device becomes less compact and more resource-intensive
Solution Approach 1:
The cipher processing capability is segmented into software-based linear operations and hardware-based non-linear operations. This segmentation enables processing capability enhancement through hardware acceleration of only the necessary components, rather than allocating hardware resources for the entire algorithm, thus improving productivity without proportionally increasing hardware resource quantity.
Solution Approach 2:
The hardware circuit is designed with multi-functionality, where the same hardware resources handle multiple cipher operations including non-linear transformations and masking operations. This universal hardware design enhances processing capability for various cipher functions without requiring separate dedicated hardware for each operation, reducing the total quantity of hardware resources needed.
Data Source
AI summary
A cryptographic device includes hardware data processing circuitry and software data processing circuitry coupled to the hardware data processing circuitry. The device, in operation, executes a plurality of rounds of a symmetrical data cipher algorithm and protects the execution of the plurality of rounds of the symmetrical data cipher algorithm. The protecting includes executing data masking and unmasking operations using the hardware data processing circuitry, executing linear operations applied to data using the software data processing circuitry, executing linear operations applied to masks using the hardware data processing circuitry, and executing non-linear operations applied to data using one of the hardware data processing circuitry or the software data processing circuitry.