Cryptographic Unit Pipeline Architecture for Block Cipher Area Reduction

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Solution Overview

Problem

As computational power increases, less sophisticated cryptographic algorithms become vulnerable to attacks, and more advanced algorithms are computationally complex, leading to performance overhead and challenges in processor implementation, such as area, power consumption, and routing issues.

Innovation Solution

A cryptographic unit configured to implement a block cipher algorithm with a pipeline architecture that processes fewer than all columns of cipher state, reducing the implementation area required and optimizing performance by proportionally scaling the resources needed for each pipeline stage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If more sophisticated cryptographic algorithms are implemented to enhance security, then resistance to attacks is improved, but computational complexity and performance overhead increase

Engineering Contradiction:
ImprovesecurityVSAvoidcomputational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the block cipher algorithm into multiple pipeline stages, where each stage processes a specific portion of the cipher state (fewer than all columns). This segmentation allows the complex cryptographic operations to be broken down into simpler, more manageable stages that can be implemented with reduced hardware complexity while maintaining security through the multi-stage processing architecture.

Inventive Principle:
Principle #1Segmentation

2Reliability

If cryptographic algorithms are made more powerful to counter new attacks, then security is improved, but hardware implementation area and power consumption increase

Engineering Contradiction:
ImprovesecurityVSAvoidhardware implementation area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent segments the cryptographic processing into multiple pipeline stages, each handling a subset of columns. This segmentation enables the hardware implementation to process cryptographic operations in parallel across multiple simpler stages rather than requiring a single complex stage, thereby reducing the total hardware area required while maintaining strong security through the distributed processing architecture.

Inventive Principle:
Principle #1Segmentation

3Area of stationary object

If pipeline stages process fewer than all columns concurrently, then implementation area is reduced, but processing throughput may be affected

Engineering Contradiction:
Improveimplementation areaVSAvoidprocessing throughput
Core Design Contradiction:
Area of stationary objectVSProductivity

Solution Approach 1:

The patent implements multiple pipeline stages that operate concurrently on different portions of the cipher state. While each individual stage processes fewer than all columns, the continuous operation of multiple stages in parallel maintains high processing throughput. The pipeline ensures that useful cryptographic actions continue without interruption across all stages, achieving both area reduction and sustained productivity through parallel processing.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS7570760B1Apparatus and method for implementing a block cipher algorithm
Publication Date: 2009.08.04 ORACLE AMERICAN INC
  • US7570760B1 patent drawing
  • US7570760B1 patent drawing
  • US7570760B1 patent drawing

AI summary

An apparatus and method for implementing a block cipher algorithm. In one embodiment, a cryptographic unit configured to implement a block cipher algorithm may include state storage configured to store cipher state, where the cipher state includes a plurality of rows and a plurality of columns. The cryptographic unit may further include a cipher pipeline comprising a plurality of pipeline stages, where each pipeline stage is configured to perform a corresponding step of the block cipher algorithm on the cipher state, and where a given one of the pipeline stages is configured to concurrently process fewer than all of the columns of the cipher state.