Cipher System with Continuously Replenished Randomness Reservoir
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Solution Overview
Problem
Existing cryptographic systems face vulnerabilities in data transmission over integrated circuits, where adversaries can exploit design vulnerabilities to access sensitive information, and dedicated deterministic random bit generators (DRBGs) consume significant power and area.
Innovation Solution
A cipher system that continuously replenishes a reservoir of bits of randomness (BOSR) using existing block cipher operations, integrating multiplexer circuits and control logic to manage clock cycles for BOSR and functional operations, reducing power consumption and silicon area by leveraging existing cipher operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dedicated deterministic random bit generator (DRBG) is used to generate random bits, then the security and unpredictability of cryptographic operations are improved, but the power consumption and silicon area increase significantly
Solution Approach 1:
The patent combines the DRBG functionality with the existing block cipher logic into a single integrated unit. The block cipher logic is configured to operate in different modes: cryptographic mode for functional operations and DRBG mode for random bit generation. This merging eliminates the need for a separate dedicated DRBG circuit, thereby reducing silicon area and power consumption while maintaining security through the use of a true random seed and cryptographic operations.
Solution Approach 2:
The block cipher logic is designed to be multi-functional, serving both as a cryptographic processing unit and as a random bit generator. By controlling the operation mode through input signals, the same hardware circuit performs both encryption/decryption operations and generates unpredictable random bits. This universality allows the system to achieve DRBG functionality without adding dedicated hardware, thus reducing power consumption and area.
2Reliability
If a dedicated deterministic random bit generator (DRBG) is used to generate random bits, then the security and unpredictability of cryptographic operations are improved, but the silicon area increases significantly
Solution Approach 1:
The patent combines the DRBG functionality with the existing block cipher logic into a single integrated unit. The block cipher logic is configured to operate in different modes: cryptographic mode for functional operations and DRBG mode for random bit generation. This merging eliminates the need for a separate dedicated DRBG circuit, thereby reducing silicon area and power consumption while maintaining security through the use of a true random seed and cryptographic operations.
Solution Approach 2:
The block cipher logic is designed to be multi-functional, serving both as a cryptographic processing unit and as a random bit generator. By controlling the operation mode through input signals, the same hardware circuit performs both encryption/decryption operations and generates unpredictable random bits. This universality allows the system to achieve DRBG functionality without adding dedicated hardware, thus reducing power consumption and area.
3Reliability
If separate DRBG operations are performed before functional operations, then the reservoir of random bits is replenished, but the operational latency increases
Solution Approach 1:
The system performs preliminary action by pre-filling the reservoir with random bits using a true random number generator during initialization. This preliminary replenishment ensures that the reservoir contains sufficient random bits to support multiple cryptographic operations without requiring frequent DRBG operations, thereby reducing operational latency while maintaining randomness availability.
Solution Approach 2:
The system maintains continuity of useful action by implementing a reservoir that continuously holds random bits available for immediate use. Instead of generating random bits on-demand for each operation (which would increase latency), the reservoir continuously maintains a supply of pre-generated random bits, allowing cryptographic operations to proceed without waiting for DRBG generation, thus reducing operational latency while ensuring randomness availability.
Data Source
AI summary
The described cipher system includes a bits of some randomness (BOSR) reservoir; a first multiplexer circuit that receives a BOSR key, a functional key, and a first control signal for selection between the BOSR key and the functional key; a second multiplexer circuit that receives a BOSR state, a functional state, and a second control signal for selection between the BOSR state and the functional state; a block cipher logic circuit that receives the outputs from the first and second multiplexer circuits and a functional input. The block cipher outputs bits into either the BOSR reservoir or as a functional output according to a third control signal. The cipher system includes a control logic block that outputs the first control signal, second control signal, and third control signal and controls whether a clock cycle of the block cipher logic circuit is used for a BOSR operation or a functional operation.