Circuit Attribute Annotation for IC Fault Protection Mapping
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Solution Overview
Problem
In high-reliability computing environments, such as Automotive Safety Integrity Level D (ASIL D), identifying and mitigating faults in integrated circuit designs becomes challenging due to the complexity and distribution of logic mitigations across large and intermingled structures, making it difficult to assess fault probabilities and manifestations.
Innovation Solution
A system is developed to annotate integrated circuit designs with attributes like error correction code, parity, or Gray code at a higher level, enabling identification and analysis of fault protection mechanisms at lower design levels, such as transistors and gates, by linking these attributes to circuitry in netlists and physical designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If integrated circuit designs grow in size and complexity to achieve higher functionality, then the device capabilities improve, but the difficulty of identifying and mitigating faults increases
Solution Approach 1:
The patent segments the integrated circuit design into multiple hierarchical levels (e.g., module level, gate level, transistor level) and applies fault mitigation annotations at each level. This segmentation allows fault analysis to be performed on smaller, manageable portions of the design rather than the entire complex circuit, thereby reducing the difficulty of fault identification while maintaining comprehensive coverage.
Solution Approach 2:
The patent introduces intermediary annotation data structures that serve as mediators between the circuit design and fault analysis processes. These annotations act as intermediate representations that capture fault mitigation information without requiring direct analysis of the entire complex circuit, thus facilitating easier fault detection and mitigation in large-scale designs.
2Reliability
If fault protection measures are distributed and intermingled throughout the design, then reliability improves, but the ability to determine which circuitry is covered by protection measures deteriorates
Solution Approach 1:
The patent applies preliminary action by annotating fault mitigation information at the earliest stages of the design process, before the design is fully implemented. By pre-marking protected circuitry and documenting protection measures in the annotation data structures, the system maintains clear information about protection coverage even as the design evolves and becomes more complex.
Solution Approach 2:
The patent implements feedback mechanisms where the annotation system continuously tracks and updates information about which circuitry is covered by protection measures. This feedback loop ensures that as distributed protection measures are applied throughout the design, the system maintains accurate information about coverage, preventing loss of protection information despite the distributed nature of the safeguards.
Data Source
AI summary
A system may generate an annotation based on an attribute determined in connection with logic. In some implementations, the logic may be between a first function (e.g., a first point of logic, such as an encoder) and a second function (e.g., a second point of logic, such as a decoder) in a first level circuit representation. The attribute may indicate, for example, fault protection using error correction code, parity, or Gray code, or a power level, frequency domain, or clock domain. The system may then identify circuitry in a second level circuit representation corresponding to the annotated logic in the first level circuit representation. The second level circuit representation may be generated based on the first level circuit representation. The system may then mark the identified circuitry in the second level circuit representation having the attribute. In some implementations, the system may determine a fault profile of an integrated circuit design based on the marking.