Circuit Board Cavity Formation via Sandblasting
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Solution Overview
Problem
The existing manufacturing process for circuit boards with cavities restricts the layout flexibility of the core layer due to the direct formation of a copper alignment layer, which limits design options and space.
Innovation Solution
A circuit board structure and manufacturing method that eliminates the need for a copper alignment layer by using a sandblasting process to form cavities, allowing for a larger layout space without affecting the circuit layout, by removing portions of the inner dielectric layer to expose the patterned circuit layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a copper alignment layer is directly formed on the core layer to serve as laser blocking layer and alignment pattern, then the cavity formation is enabled, but the layout flexibility of the core layer is restricted
Solution Approach 1:
The invention separates the copper alignment layer from the core layer by introducing an inner dielectric layer between them. This segmentation allows the copper alignment layer to be disposed on the inner dielectric layer rather than directly on the core layer, thereby enabling cavity formation while maintaining layout flexibility of the core layer circuits.
Solution Approach 2:
The inner dielectric layer serves as an intermediary between the core layer and the copper alignment layer. This intermediary layer enables the copper alignment layer to function as both laser blocking layer and alignment pattern without directly restricting the core layer circuit layout, thus resolving the contradiction between manufacturing precision and layout flexibility.
2Reliability
If a copper alignment layer is formed on the core layer to prevent excessive ablation, then the cavity can be formed by laser ablation, but the circuit layout options are reduced
Solution Approach 1:
By segmenting the structure and placing the copper alignment layer on the inner dielectric layer rather than the core layer, the invention maintains reliable laser ablation control while eliminating restrictions on core layer circuit layout options.
Solution Approach 2:
The invention moves the copper alignment layer to a different dimensional position (on top of the inner dielectric layer) rather than keeping it on the core layer. This dimensional change allows the copper alignment layer to perform its laser control function without constraining the core layer circuit layout in the planar dimension.
3Ease of manufacture
If the copper alignment layer is used as laser alignment pattern, then the laser ablation process is facilitated, but the layout flexibility is reduced
Solution Approach 1:
The invention segments the functional layers by placing the copper alignment layer on the inner dielectric layer, which facilitates the laser ablation process through proper alignment while avoiding restrictions on the core layer circuit layout.
Solution Approach 2:
The inner dielectric layer acts as an intermediary that enables the copper alignment layer to serve as an effective laser alignment pattern without directly impacting the core layer circuit design flexibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach provides enhanced layout flexibility and larger space for circuit design without the need for a copper alignment layer, ensuring the circuit layout is not compromised during the manufacturing process.
Implementation Method 1
a sandblasting process is used to form cavities exposing portions of the patterned circuit layers without the need for a copper alignment layer, allowing for increased layout flexibility by removing the inner dielectric layer to create cavities that expose the patterned circuit layers
Data Source
AI summary
A manufacturing method of a circuit board structure includes the following steps: providing an inner circuit structure which includes a core layer; performing a build-up process to laminate a first build-up circuit structure on a first patterned circuit layer of the inner circuit structure, wherein the first build-up circuit structure includes an inner dielectric layer, and the inner dielectric layer directly covers an upper surface of the core layer and the first patterned circuit layer; removing a portion of the first build-up circuit structure to form an opening extending from a first surface of the first build-up circuit structure relatively far away from the inner circuit structure to a portion of the inner dielectric layer; performing a sandblasting process on a first inner surface of the inner dielectric layer exposed by the opening to at least remove the portion of the inner dielectric layer exposed by the opening.