Circuit Board Floating Pattern for FEXT Noise Reduction

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Solution Overview

Problem

Mutual inductance between signal terminals causes far-end crosstalk (FEXT), impairing signal integrity (SI) and interfering with high-speed operation in memory modules.

Innovation Solution

Incorporation of a floating pattern embedded in the insulating layer of a circuit board, overlapping and electrically disconnected from signal terminals, to create mutual capacitance and reduce far-end crosstalk noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If signal terminals are positioned close to each other for compact design, then area is reduced, but far-end crosstalk noise increases due to mutual inductance

Engineering Contradiction:
Improvecircuit board areaVSAvoidfar-end crosstalk noise
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

A floating pattern is introduced as an intermediary element between the first signal terminal and the second signal terminal. This floating pattern overlaps both signal terminals and creates mutual capacitance that counteracts the harmful mutual inductance, thereby reducing far-end crosstalk noise while allowing the signal terminals to remain in close proximity for compact design

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the electrical parameter relationship between signal terminals by introducing capacitive coupling through the floating pattern. This creates a compensating effect where the mutual capacitance generated by the floating pattern offsets the mutual inductance between adjacent signal terminals, reducing crosstalk without increasing spacing

Inventive Principle:
Principle #35Parameter changes

2Reliability

If floating pattern is added to reduce crosstalk, then signal integrity is improved, but device complexity increases

Engineering Contradiction:
Improvesignal integrityVSAvoidcircuit board structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The floating pattern serves multiple functions simultaneously: it creates mutual capacitance to counteract mutual inductance, reduces far-end crosstalk noise, and maintains compact signal terminal spacing. This multi-functionality improves signal integrity without proportionally increasing device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The floating pattern can be replicated across different regions of the circuit board where crosstalk issues occur. By using a standardized floating pattern design that can be copied and pasted to multiple locations, the complexity increase is minimized while achieving widespread signal integrity improvement

Inventive Principle:
Principle #26Copying

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The floating pattern effectively reduces far-end crosstalk noise and improves signal integrity by maximizing mutual capacitance between signal terminals without affecting existing wires or increasing design costs.

Implementation Method 1

the floating pattern effectively reduces far-end crosstalk noise and improves signal integrity by maximizing mutual capacitance between signal terminals

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS20250374427A1Circuit board, semiconductor module and semiconductor system
Publication Date: 2025.12.04 SAMSUNG ELECTRONICS CO LTD
  • US20250374427A1 patent drawing
  • US20250374427A1 patent drawing
  • US20250374427A1 patent drawing

AI summary

A circuit board includes: an insulating layer configured to have a first surface and a second surface opposite to each other; first terminals positioned on the first surface of the insulating layer and configured to include a first signal terminal and a second signal terminal; and a first floating pattern embedded in the insulating layer, configured to have a region overlapping each of the first signal terminal and the second signal terminal, and electrically disconnected from the first signal terminal and the second signal terminal.