Circuit Board Pad Extension for High-Frequency Impedance Matching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional wiring boards experience impedance mismatch and deteriorated signal transmission quality under high-frequency signal transmission due to induced inductance from bonding wires, particularly between signal lines and inner leads in chip packages.
Innovation Solution
The circuit board design includes patterned conductive layers with extension pads and second pads that overlap inner leads, generating induced capacitance to compensate for inductance, improving signal transmission quality by adjusting the dimensions and shapes of these features to optimize capacitance values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bonding wires are used to electrically connect the chip to the lead frame, then electrical connection is achieved, but induced inductance is generated which aggravates impedance mismatch and deteriorates signal transmission quality
Solution Approach 1:
The patent utilizes the harmful induced inductance of bonding wires by positioning them adjacent to a pad extension, which generates induced capacitance. This induced capacitance compensates for the inductance effect, transforming the harmful inductive reactance into a beneficial impedance matching solution that improves high-frequency signal transmission quality.
Solution Approach 2:
The patent changes the geometric parameters of the pad structure by adding an extension to the first pad. This structural modification alters the electrical parameters (inductance and capacitance) of the connection path, enabling impedance compensation and improvement of signal transmission characteristics at high frequencies.
2Reliability
If conventional patterned conductive layers are used on the circuit board, then basic electrical connection is achieved, but impedance mismatch occurs under high-frequency signal transmission
Solution Approach 1:
The patent segments the pad structure into a first pad and an extended portion, creating distinct functional zones. The extension acts as a separate impedance compensation element that works in conjunction with the bonding wire-induced capacitance to achieve better impedance matching for high-frequency signals.
Solution Approach 2:
The patent extends the pad in a dimensional direction beyond the conventional pad boundary. This dimensional extension creates additional capacitive coupling area with the bonding wire, generating the necessary induced capacitance to compensate for inductance and improve impedance matching in the high-frequency domain.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively compensates for impedance mismatch, increasing return loss and reducing insertion loss in high-frequency signal transmission, enhancing overall signal quality between transmission lines and inner leads.
Implementation Method 1
generating induced capacitance to compensate for inductance
Implementation Method 2
The other end of the inner lead suitable for being electrically connected to the second pad has a projection at least partially overlapping the extension part on the patterned conductive layer
Data Source
AI summary
A circuit board suitable for being electrically connected to a chip package is provided. The chip package has a chip pad and a plurality of inner leads. The circuit board includes at least one patterned conductive layer and at least one insulating layer. The patterned conductive layer has at least one first pad and at least one second pad. The first pad has an extension part and is suitable for being electrically connected to the chip pad. The second pad is suitable for being electrically connected to one end of at least one of the inner leads, while the other end of the inner lead suitable for being electrically connected to the second pad has a projection at least partially overlapping the extension part on the patterned conductive layer. Moreover, the patterned conductive layer is disposed outside the insulating layer.