Circuit Board Pad Region Thickness for Wire Bonding
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Solution Overview
Problem
Conventional circuit boards with uniform trace and pad regions suffer from non-stick effects during wire bonding due to uneven stress distribution, leading to potential cracking when stud bumps are offset, and reducing trace region thickness to resolve this issue compromises stress resistance.
Innovation Solution
A circuit board design with a pad region thickness less than half that of the trace region, combined with an electrical connection layer like nickel-gold or palladium, ensures better support for stud bumps and prevents non-stick effects while maintaining sufficient stress resistance in the trace region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the thickness of the pad region is reduced to resolve non-stick effects, then the non-stick effect is improved, but the stress resistance of the trace region deteriorates
Solution Approach 1:
The circuit board employs different thicknesses for different regions: the pad region has a first thickness optimized for wire bonding support, while the trace region has a second thickness (greater than the first) optimized for stress resistance. This local differentiation allows each region to perform its specific function optimally without compromising the other.
Solution Approach 2:
The circuit board is segmented into distinct regions with different structural characteristics - the pad region and the trace region are separated and given different thicknesses. This segmentation allows independent optimization of each region's properties to suit its specific functional requirements.
2Reliability
If the thickness of the pad region is reduced to improve stud bump support, then the non-stick effect is reduced, but the overall structural integrity deteriorates
Solution Approach 1:
The pad region is given a specific thickness (first thickness) that provides optimal support for stud bumps during wire bonding, while the trace region maintains a greater thickness (second thickness) to ensure overall structural integrity. This localized thickness differentiation resolves the contradiction between improving stud bump support and maintaining structural stability.
3Reliability
If the trace region thickness is reduced from 20 micrometers to 10 micrometers to resolve non-stick effects, then the non-stick effect is improved, but crack formation occurs
Solution Approach 1:
Instead of uniformly reducing the thickness of the entire circuit board, the invention applies different thicknesses to different regions: the pad region uses a first thickness that prevents non-stick effects, while the trace region maintains a greater second thickness that prevents crack formation. This localized approach allows wire bonding reliability to be improved without sacrificing crack resistance.
Data Source
AI summary
A process for fabricating a circuit board that includes a dielectric layer, a circuit layer, and an insulation layer. The circuit layer is disposed on the dielectric layer and has a pad region and a trace region. The insulation layer is disposed on the circuit layer and covers the trace region. Here, a thickness of the pad region is less than a thickness of the trace region.