Circuit Board Via Layout Density via Nested Hole Trench
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Solution Overview
Problem
Current circuit board manufacturing methods struggle to achieve high layout density due to limitations in line width and pitch, leading to inefficiencies in semiconductor component integration and miniaturization.
Innovation Solution
A method involving the formation of a first circuit layer, dielectric layers, and conductive vias, where trenches and holes are formed simultaneously or by the same machine, allowing for a smaller diameter of the conductive via and reducing space occupation, thereby increasing layout density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional manufacturing methods are used to form conductive vias and trenches, then the manufacturing process is simple, but the layout density of the circuit board is limited due to larger via diameter and ring structures
Solution Approach 1:
The patent merges the formation of the trench and the second hole into a single simultaneous process step using the same machine. This integration eliminates the need for separate processing steps, thereby reducing manufacturing complexity while achieving the precise alignment needed for high layout density. The combined process forms both structures in one exposure and development cycle, avoiding cumulative alignment errors that would otherwise require additional correction steps.
Solution Approach 2:
The patent implements a nested structure where the second hole is formed inside the first hole, and the trench is formed in the second dielectric layer. This nesting approach allows the conductive via (formed in the second hole) to be positioned precisely within the alignment margin of the first hole, maximizing space utilization. The trench surrounds or adjoins the second hole, creating a compact nested arrangement that reduces overall space occupation while maintaining functional integrity.
2Manufacturing precision
If the diameter of the conductive via is reduced to increase layout density, then more components can be integrated, but the manufacturing precision requirements increase significantly
Solution Approach 1:
The patent performs preliminary alignment by forming the first hole and first dielectric layer structure before creating the second hole and trench. The first hole serves as a pre-established alignment reference that guides the subsequent formation of the second hole. This preliminary structuring ensures that when the second hole is formed with a smaller diameter, its position is predetermined and aligned within the margins of the first hole, reducing the need for high-precision measurement during the actual via formation step.
Solution Approach 2:
The first dielectric layer and first circuit layer function as intermediary stop layers that mediate the alignment between the first hole and the second hole. These intermediate structures provide physical boundaries and reference planes that facilitate precise positioning. The stop layers allow the etching or drilling process to self-align, using the existing structures as guides, thereby reducing the measurement precision requirements for the final via placement.
3Manufacturing precision
If trenches and holes are formed by separate processes, then manufacturing flexibility is maintained, but alignment deviations occur leading to ring structures that occupy more space
Solution Approach 1:
The patent combines the trench formation and second hole formation into a single simultaneous process using the same machine. This merging eliminates alignment deviations that would occur between separate processes, as both structures are created in one exposure and development cycle. The combined approach removes the need for complex alignment procedures and eliminates ring structures caused by misalignment, while the process remains flexible through standard photolithography techniques.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the space occupied by conductive vias, allowing for higher layout density and improved integration of semiconductor components by avoiding deviations and ring structures, thus enhancing the overall performance of circuit boards.
Implementation Method 1
forming the metal layer by electroplating
Data Source
AI summary
A method for manufacturing a circuit board structure is provided. First, a first circuit layer is formed on a carrier. Then, a first dielectric layer is formed on the carrier and the first circuit layer. Thereafter, at least one first hole is formed in the first dielectric layer to expose a portion of the first circuit layer. Then, a second dielectric layer is formed on the first dielectric layer and the first circuit layer. Thereafter, at least one trench and at least one second hole are formed in the second dielectric layer, in which the trench exposes a portion of the first dielectric layer, and the second hole exposes the portion of the first circuit layer. The second hole is disposed in the first hole. Then, a metal layer is formed to fill the trench and the second hole.