Circuit Cell With Resistive Memory And Bipolar Selector
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Solution Overview
Problem
Existing memory cell designs for SRAM introduce a significant area penalty due to the need for additional transistors and signal lines to control resistive memory elements for non-volatile storage.
Innovation Solution
A circuit cell design that incorporates resistive memory elements and bipolar selectors, allowing for non-volatile storage of logic states with reduced area requirements by using a shared select line and control voltage to manage the memory units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional transistors and signal lines are introduced to control resistive memory elements for non-volatile storage, then non-volatile data storage capability is achieved, but area penalty increases significantly
Solution Approach 1:
The patent merges the control of multiple resistive memory elements under a single select line, combining multiple control functions into a shared resource. This allows memory units to be controlled without requiring dedicated transistors for each element, thereby achieving non-volatile storage while reducing the area penalty associated with additional control circuitry.
Solution Approach 2:
The select line serves multiple functions: it acts as a common control signal for multiple memory units, enables selective access to different memory elements, and provides a universal interface for both read and write operations. This multi-functionality eliminates the need for separate dedicated control transistors for each memory element, reducing overall cell area.
2Area of stationary object
If a shared select line is used to control multiple memory units, then area requirements are reduced, but control signal complexity increases
Solution Approach 1:
Instead of providing separate control lines for each memory unit (which would increase wiring complexity), the patent inverts the approach by using a single shared select line that all memory units respond to. The memory units themselves perform the selective addressing based on their internal state, thereby reducing external wiring complexity while maintaining area efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables efficient non-volatile storage of logic states with a reduced area penalty, allowing for the restoration of logic states when power is available again, while maintaining the complexity and area requirements of prior art approaches.
Implementation Method 1
configured such that a current flows between the first terminal and the select line when an absolute value of a difference between a control voltage applied to the select line and a logic level voltage at the output node exceeds a threshold of the bipolar selector
Implementation Method 2
each output node is connected to a respective memory element comprising a resistive memory element, allowing a high or low logic level voltage to be saved as a respective resistive state of the resistive memory element, which may be maintained in a non-volatile manner even after power is removed
Data Source
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Figure 3a~4a
AI summary
According to an aspect there is provided a circuit cell for a memory device or a logic device, comprising: a first and a second logic gate having a respective output node, wherein each output node is configured to hold either one of a complementary high and low logic level voltages; a select line; a first and a second memory unit, each comprising a first terminal and a second terminal, and a resistive memory element and a bipolar selector connected in series between the first and second terminals, wherein the first terminals of the first and the second memory unit are connected to the output node of the first and second logic gate, respectively, and wherein the second terminals of the first and the second memory unit are connected to the select line; wherein each resistive memory element is configured to be switchable between a first and a second resistance state and in response to a switching current and each bipolar selector is configured to be conducting in response to an absolute value of a voltage difference across the bipolar selector exceeding a threshold of the bipolar selector and non-conducting in response to the absolute value being lower than said threshold.