Circuit Design Optimization via Dynamic Clock Frequency
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Solution Overview
Problem
Conventional integrated circuit design systems impose a fixed clock frequency constraint, leading to sub-optimal efficiencies in processing circuitry as different logic designs may exhibit varying efficiencies at different clock frequencies.
Innovation Solution
A circuit design system that dynamically optimizes clock signal frequencies and design constraints by identifying combinations of clock frequencies and chip area constraints that minimize a cost function, allowing for the generation of optimized logic designs and fabrication of more efficient processing circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a fixed clock frequency constraint is imposed during circuit design, then design standardization and ease of manufacture are improved, but processing circuitry efficiency deteriorates
Solution Approach 1:
The patent applies dynamics by transitioning from a static fixed clock frequency constraint to a dynamic optimization process. The circuit design system evaluates multiple clock frequency options and selects the optimal frequency based on efficiency metrics, allowing the design to adapt to specific performance requirements rather than being constrained by a predetermined standard.
Solution Approach 2:
The patent changes the clock frequency parameter from a fixed standardized value to a variable that can be optimized. The design system evaluates different clock frequency values and their impact on processing circuitry efficiency, selecting the parameter value that maximizes performance for the specific design scenario.
2Productivity
If multiple clock frequency options are evaluated to optimize efficiency, then processing circuitry efficiency is improved, but design complexity increases
Solution Approach 1:
The patent applies self-service by enabling the circuit design system to automatically evaluate multiple clock frequency options and select the optimal value without requiring manual intervention. The automated optimization process manages the increased complexity by systematically evaluating options and making data-driven decisions, reducing the burden on designers while achieving superior efficiency.
3Productivity
If automated optimization of clock frequency is implemented, then processing circuitry efficiency is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies preliminary action by performing clock frequency optimization during the design phase rather than during manufacturing. The circuit design system determines the optimal frequency value before fabrication, allowing manufacturers to simply implement the specified frequency without requiring complex real-time optimization capabilities or high-precision adjustment mechanisms during production.
Data Source
AI summary
Circuit design equipment may design logic for a circuit. The design equipment may discover optimized design constraints and an optimized clock signal frequency for the circuit. The design equipment may output the discovered optimized clock signal frequency and design constraints to circuit fabrication equipment for fabricating the corresponding circuit. The design equipment may discover the optimized clock signal frequency and design constraints by populating a cost function with different clock signal frequencies and different design constraint values. The cost function may be, for example, a multi-dimensional surface. The design equipment may identify a global minimum of the cost function and may identify the clock signal frequency and design constraint values that correspond to the global minimum as the optimized clock frequency and optimized design constraints to provide to circuit fabrication equipment. The fabrication equipment may fabricate the circuit to implement the optimized design constraint values and clock frequency.