Graphical Circuit Design Conversion to High-Level Language
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Solution Overview
Problem
Existing methods for preparing electronic circuit designs, such as GUI-based systems and HDLs, lack flexibility and efficiency in parameterization and adaptation for designs with numerous blocks and changing connections, especially when scaling for different applications.
Innovation Solution
Converting graphical models of electronic circuit designs into high-level language (HLL) programs, allowing for parameterization and adaptation through scripting languages like MATLAB or C++, which enables easier customization and integration with other tools.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a graphical user interface (GUI) approach is used to create circuit designs, then the design can be abstracted at a high level with easy assembly of basic building blocks, but the designer sacrifices control over the eventual implementation and flexibility for scaling to different applications
Solution Approach 1:
The patent introduces an intermediary conversion tool that translates graphical circuit design models into executable high-level language programs. This mediator enables designers to work with the ease of GUI-based graphical models while the generated HLL programs provide the flexibility and control needed for scaling to different applications, thus resolving the contradiction between ease of operation and adaptability.
2Adaptability or versatility
If a hardware description language (HDL) is used to specify circuit designs, then the designer has greater control over implementation, but the designer cannot easily abstract the design at a high level and the process is more cumbersome
Solution Approach 1:
The patent replaces the manual, mechanical process of writing HDL code with an automated system that generates HLL programs from graphical models. This substitution eliminates the cumbersome nature of HDL while preserving implementation control, as the generated programs maintain the ability to specify detailed implementation while being created through the more intuitive graphical interface.
3Adaptability or versatility
If scripting languages like MATLAB are used to create circuit designs, then flexible parameterization and scaling are enabled, but the languages are cumbersome for quickly assembling components of circuit design
Solution Approach 1:
The patent performs preliminary action by automatically generating the parameterization and component assembly code through conversion from graphical models. This eliminates the need for manual scripting while preserving flexible parameterization, as the conversion process pre-computes and generates the necessary HLL program structure with all parameter relationships already established.
4Ease of operation
If high-level programming languages like JAVA, JAVASCRIPT, C++, or Tcl are used to create circuit designs, then higher level abstraction is achieved, but the languages are cumbersome for quickly assembling components and lack efficient parameterization
Solution Approach 1:
The patent implements efficient parameterization by generating HLL programs that explicitly define parameter relationships and allow dynamic modification. The conversion process creates programs with clear parameter interfaces that can be efficiently changed and scaled, combining the high-level abstraction of modern programming languages with the parameterization efficiency needed for circuit design scaling.
Data Source
AI summary
Approaches for processing an electronic circuit design. In one embodiment, the graphical model of an outer subsystem block and an inner subsystem block are translated into a high-level language (HLL) program. The HLL program includes a specification of a first function corresponding to the outer subsystem block and within the specification of the first function a specification of a second function corresponding to the inner subsystem block. The specification of the first function references a parameter of the outer subsystem block and specifies invocation of the second function. The specification of the second function specifies invocation of a third function corresponding to a leaf block in the inner subsystem block. The specification of the first function references a variable corresponding to the parameter, and that variable is referenced by the second or third functions. Execution of the HLL program instantiates a model of the design.


