Circuit Design Robustness Metric via Slack Change Indicators
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Solution Overview
Problem
Conventional methods for determining circuit design robustness, such as using total negative slack (TNS), are inadequate as they do not provide accurate indications of design robustness changes and can produce misleading results, especially when considering the magnitude of changes in TNS values relative to the original values.
Innovation Solution
A system that calculates change indicators for circuit design robustness by determining base and new critical path delays and slacks, predicting critical path delays in new implementations, and comparing them to base delays to compute endpoint and pathgroup change indicators, ultimately providing a robustness metric that accounts for changes in design flows and scenarios.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional TNS-based metrics are used to indicate design robustness, then a simple indicator is provided, but the indicator produces highly misleading results and does not accurately reflect robustness changes
Solution Approach 1:
The patent transforms the TNS metric by introducing normalized change indicators that express robustness changes as percentages relative to base values. This parameter transformation converts absolute slack differences into relative metrics that accurately reflect the magnitude of changes, resolving the issue of misleading results while maintaining measurement precision.
Solution Approach 2:
The patent introduces intermediate calculations including base critical path delays, base slacks, and normalized change indicators as mediators between the raw TNS values and the final robustness assessment. These intermediaries process the raw data to eliminate misleading characteristics while preserving accurate information about robustness changes.
2Adaptability or versatility
If the critical path changes between base and new implementations, then the robustness metric should account for this variability, but conventional methods cannot accurately predict or compare delays across different critical paths
Solution Approach 1:
The patent performs preliminary identification and recording of base critical path delays before implementing design changes. By establishing these baseline values in advance, the system can later compare them against new critical path delays even when the critical paths themselves change, enabling accurate robustness assessment across different implementation scenarios.
Solution Approach 2:
The patent creates a virtual copy of the base critical path delay values and uses this copied data as a reference framework for comparing new implementations. This copying approach allows the system to maintain a stable reference point even when the actual critical paths change, ensuring consistent and accurate delay comparisons across different design iterations.
Data Source
AI summary
Some embodiments provide techniques and systems for determining a change indicator for an endpoint, a pathgroup, a design, and/or a flow. The system can determine base critical path delays and base slacks for the endpoints in a base implementation of the circuit design. The system can then determine the new critical path delays and new slacks for the endpoints in a new implementation of the circuit design. Next, the system determines slack differences for the endpoints using the new slacks and the base slacks. Finally, for each endpoint, the system can determine an endpoint change indicator using the associated slack difference, the base critical path delay, and the new critical path delay. A pathgroup change indicator can be determined using endpoint change indicators. A design change indicator can be determined using pathgroup change indicators or scenario change indicators. A design flow change indicator can be determined using design change indicators.