Circuit Element Placement Stabilizing VLSI Synthesis
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
During very-large-scale integration (VLSI) design flows, circuit designers face challenges with iterative physical synthesis tools, leading to unstable synthesis results and long turnaround times due to huge changes in design iterations, resulting in convergence failures and reduced design productivity.
Innovation Solution
A computer-based circuit design system that performs physical synthesis to calculate preferred locations and placement constraints for circuit elements, iteratively refining these until convergence is achieved based on timing, power, area, and operating temperature, while adjusting for routing congestion and design rules, thereby stabilizing design iterations and reducing retuning time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If physical synthesis tools are used iteratively for VLSI design, then design optimization can be achieved, but synthesis results become unstable and turnaround time increases
Solution Approach 1:
The system performs preliminary placement of circuit elements based on their relative importance and criticality before detailed routing. By pre-positioning elements in optimal locations considering timing, power, area, and temperature constraints, the system reduces the number of iterative adjustments needed, thereby decreasing turnaround time while maintaining design optimization.
Solution Approach 2:
The system dynamically adjusts placement parameters such as element positions, spacing, and grouping based on multiple competing objectives (timing, power, area, temperature). By changing these parameters iteratively with convergence detection, the system achieves stable synthesis results that satisfy all constraints without excessive iteration, thus reducing turnaround time while preserving optimization quality.
2Manufacturing precision
If multiple design constraints are enforced, then design quality improves, but convergence becomes difficult to achieve
Solution Approach 1:
The system employs parameter changes to adjust placement configurations when convergence is not achieved. By modifying element positions, spacing, and grouping based on constraint violations, the system maintains design quality while promoting convergence. The locator computes preferred locations considering all constraints, and the adjustor modifies placements to achieve stability.
Solution Approach 2:
The system implements feedback mechanisms where synthesis results are analyzed to detect convergence. When convergence is detected or when constraints are violated, the system provides feedback to the placement engine to adjust element positions and spacing. This closed-loop control ensures design quality is maintained while achieving convergence across multiple constraints.
3Ease of manufacture
If element locations are fixed early, then routing congestion is reduced, but design flexibility decreases
Solution Approach 1:
The system performs preliminary placement of critical elements early in the design process to establish a stable framework that reduces routing congestion. However, non-critical elements are left flexible for later adjustment. This approach reduces congestion while preserving design flexibility for subsequent optimization iterations.
Solution Approach 2:
The system applies different placement strategies to different regions and element types. Critical elements on timing paths are firmly placed to reduce congestion in those areas, while non-critical elements maintain flexibility. The locator computes preferred locations with different degrees of constraint based on element criticality, achieving local optimization without sacrificing overall design flexibility.
Data Source
AI summary
An improved circuit design system may include a computer processor to perform a placement for a circuit by physical synthesis. The system may also include a controller to compute a preferred location of at least one selected element of the circuit, and to calculate placement constraints for each selected element. The system may further include an updated design for the circuit generated by performing another round of physical synthesis with the placement constraints.