Cross-Platform Circuit Emulation Replay Using TARBM Bitmaps
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Solution Overview
Problem
Digital design emulations are challenging to reproduce due to non-deterministic traffic between host computing systems and emulation machines, making it difficult to verify designs across different platforms.
Innovation Solution
A configuration for cross-platform capture and replay of circuit design emulations using time-annotated ready bits messages (TARBMs) and bitmap files to record and transform stimuli, enabling emulation on different hardware architectures with reduced computational complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If emulation is performed on different platforms with non-deterministic traffic, then platform versatility is improved, but reproduction reliability deteriorates
Solution Approach 1:
The system performs preliminary actions by capturing and storing the complete emulation state (including processor states, memory contents, and I/O device states) at specific points during the emulation process. These captured states are then replayed in subsequent sessions to ensure deterministic reproduction across different platforms, resolving the contradiction between platform versatility and reproduction reliability.
2Reliability
If complete emulation state is captured for deterministic replay, then reproduction reliability is improved, but memory usage increases
Solution Approach 1:
The system extracts only the essential state information needed for deterministic replay, specifically capturing processor states, memory contents, and I/O device states at key emulation points. By extracting and storing only these critical elements rather than the entire system state continuously, the patent achieves reliable reproduction while managing memory usage efficiently.
3Manufacturing precision
If detailed timing information is recorded for each emulation cycle, then emulation accuracy is improved, but computational complexity increases
Solution Approach 1:
The system performs preliminary timing analysis during the initial emulation run, capturing timing information for I/O operations and storing it alongside the emulation state. This preliminary capture of timing data enables accurate deterministic replay without requiring complex real-time timing calculations during replay sessions, thus improving emulation accuracy while managing computational complexity.
Data Source
AI summary
A configuration/method/system for cross-platform capture/replay of an emulation of a circuit design. The system receives, during an emulation of a circuit design performed on a first platform, time-annotated ready bits messages (TARBMs), and generates a first set of TARBM files, each corresponding to a particular FPGA in the first set of FPGAs. The system also generates a first set of bitmap file for the first platform, and a second set of bitmap file for a second platform. Each bitmap file records a bit index of each ready bit of an FPGA in a corresponding platform. The system then generates a second set of TARBM files based in part on the first set of TARBM files and the two sets of bitmap files. The emulation of the circuit design can then be replayed on the second platform based in part on the second set of TARBM files.


